Seal material for air gaps in semiconductor devices
The present disclosure relates to a semiconductor device including first and second terminals formed on a fin region and a seal layer formed between the first and second terminals. The seal layer includes a silicon carbide material doped with oxygen. The semiconductor device also includes an air gap surrounded by the seal layer, the fin region, and the first and second terminals.
1. A semiconductor device, comprising:
first and second terminals formed on a fin region;
a seal layer formed between the first and second terminals, wherein the seal layer comprises a silicon carbide material doped with oxygen;
an air gap surrounded by the seal layer, the fin region, and the first and second terminals; and
a contact on the first terminal, wherein the contact comprises the silicon carbide material doped with oxygen.
2. The semiconductor device of claim 1 , wherein the first terminal comprises a gate electrode and the second terminal comprises a source/drain (S/D) contact.
3. The semiconductor device of claim 2 , wherein the first terminal further comprises:
a gate dielectric layer on a sidewall of the gate electrode; and
a spacer comprising a first portion on a sidewall of the gate dielectric layer and a second portion on a top surface of the fin region.
4. The semiconductor device of claim 3 , wherein the air gap is in physical contact with the first and second portions of the spacer.
5. The semiconductor device of claim 1 , wherein a density of the seal layer is between about 2.0 g/cm 3 and about 3.2 g/cm 3 .
6. The semiconductor device of claim 1 , wherein an oxygen atomic content of the seal layer is between about 30% and about 55%.
7. The semiconductor device of claim 1 , wherein a carbon atomic content of the seal layer is between about 10% and about 35%.
8. The semiconductor device of claim 1 , wherein a silicon atomic content of the seal layer is between about 25% and about 35%.
9. The semiconductor device of claim 1 , wherein top surfaces of the seal layer, the first terminal, and the second terminal are substantially coplanar.
10. The semiconductor device of claim 1 , wherein the contact comprises a top surface that is substantially coplanar with a top surface of the seal layer.
11. A semiconductor device, comprising:
a gate structure on a fin region, comprising;
a gate electrode; and
a self-aligned contact (SAC) formed on the gate electrode and comprising a silicon carbide material doped with oxygen;
a source/drain (S/D) contact;
a seal layer comprising the silicon carbide material doped with oxygen, wherein the seal layer further comprises:
a first portion between the gate structure and the S/D contact; and
a second portion on top surfaces of the SAC and the S/D contact; and
an air gap surrounded by the seal layer, the fin region, the gate electrode, and the S/D contact.
12. The semiconductor device of claim 11 , wherein a density of the seal layer is between about 2.0 g/cm 3 and about 3.2 g/cm 3 .
13. The semiconductor device of claim 11 , wherein an oxygen atomic content of the seal layer is between about 30% and about 55%.
14. The semiconductor device of claim 11 , further comprising a via extending through the second portion of the seal layer and in physical contact with the SAC.
15. The semiconductor device of claim 11 , further comprising a gate dielectric layer and a spacer, wherein the spacer comprises a first portion on a sidewall of the gate dielectric layer and a second portion on a top surface of the fin region.
16. A method for forming a semiconductor device, comprising:
forming an opening over a top surface of a substrate and between first and second terminals of the semiconductor device; and
forming a silicon carbide material, comprising:
depositing a first portion of the silicon carbide material in the opening and between the first and second terminals;
depositing a second portion of the silicon carbide material on top surfaces of the first and second terminals, wherein a pocket of air is entrapped in the opening surrounded by the silicon carbide material, the first and second terminals, and the substrate; and
performing an oxygen anneal process on the deposited first and second portions of the silicon carbide material.
17. The method of claim 16 , wherein the first portion of the silicon carbide material is deposited towards a top of the opening.
18. The method of claim 16 , wherein depositing the first and second portions of the silicon carbide material comprises flowing tetramethyldisiloxane (TSMDSO), hydrogen gas, and oxygen gas into a deposition chamber.
19. The method of claim 18 , wherein a flow ratio of the hydrogen gas to the oxygen gas is between about 20 and about 30.
20. The method of claim 16 , further comprising:
etching the first terminal to recess the first terminal;
depositing another silicon carbide material on the recessed first terminal; and
performing another oxygen anneal process on the deposited silicon carbide material.