MEMS device and manufacturing method thereof

1. A manufacturing method of a MEMS device, comprising:

forming a CMOS circuit; and

forming a MEMS module on the CMOS circuit which is coupling to the MEMS module and configured to drive the MEMS module, wherein,

the step of forming the MEMS module comprises:

forming a protective layer;

forming a first contact hole and the second contact hole in the protective layer;

forming a sacrificial layer in the protective layer;

forming a first electrode on the protective layer and on the sacrificial layer so that the first electrode covers the sacrificial layer, and electrically coupling the first electrode to the CMOS circuit;

forming a piezoelectric layer on the first electrode and above the sacrificial layer;

forming a second electrode on the piezoelectric layer and electrically coupling the second electrode to the CMOS circuit;

forming a through hole in the first electrode or in the protective layer to reach the sacrificial layer; and

forming a cavity by removing the sacrificial layer through the through hole,

wherein, the step of forming the CMOS circuit comprises: forming a plurality of second interconnecting holes in a second dielectric layer, and patterning a second wiring layer on the second dielectric layer to form a plurality of second interconnecting leads each of which has one end in one of the plurality of second interconnecting holes and the other end extending into the first contact hole and the second contact hole,

the first electrode is electrically coupling to the CMOS circuit through the first contact hole, and the second electrode is electrically coupling to the CMOS circuit through the second contact hole.

2. The manufacturing method according to claim 1 , wherein the step of forming the sacrificial layer comprises:

forming an opening in the protective layer;

filling the opening with a sacrificial material; and

removing a part of the sacrificial material that is outside the opening.

3. The manufacturing method according to claim 2 , wherein the sacrificial material comprises phosphosilicate glass.

4. The manufacturing method according to claim 1 , wherein, the step of forming the first electrode comprises:

forming a first conductive layer on the protective layer and on the sacrificial layer; and

patterning the first conductive layer to form the first electrode,

wherein a part of the first electrode is located in the first contact hole.

5. The manufacturing method according to claim 4 , wherein, the step of forming the second electrode comprises:

forming a second conductive layer on the protective layer and on the piezoelectric layer;

patterning the second conductive layer to form the second electrode,

wherein a part of the second electrode is located in the second contact hole.

6. The manufacturing method according to claim 1 , wherein the step of forming the cavity comprises: removing the sacrificial layer though the through hole by a hydrofluoric acid vapor phase fumigation process.

7. The manufacturing method according to claim 6 , wherein, the piezoelectric layer covers a part of the first electrode and exposes the through hole.

8. The manufacturing method according to claim 5 , wherein the step of forming the CMOS circuit comprises:

forming a first transistor and a second transistor on a substrate; and

sequentially forming a first dielectric layer, a first wiring layer, the second dielectric layer and the second wiring layer on the first transistor and the second transistor.

9. The manufacturing method according to claim 8 , wherein, the step of forming the CMOS circuit further comprises: forming a plurality of first interconnecting holes in the first dielectric layer before the step of forming the first wiring layer, and

the step of forming the CMOS circuit further comprises: patterning the first wiring layer to form a plurality of first interconnecting leads each of which contacts the first transistor or the second transistor through one of the plurality of first interconnecting holes after the step of forming the first wiring layer.

10. The manufacturing method according to claim 9 , each of the plurality of second interconnecting leads has one end connecting to one of the plurality of first interconnecting leads through one of the plurality of second interconnecting holes.

11. The manufacturing method according to claim 9 , wherein the first transistor and the second transistor are coupling by one of the plurality of first interconnecting leads.

12. The manufacturing method according to claim 1 , wherein the protective layer has an etching ratio greater than that of silicon dioxide.

13. The manufacturing method according to claim 1 , wherein a material of the protective layer comprises silicon nitride.

14. The manufacturing method according to claim 1 , wherein the protective layer has a thickness of more than 2 μm.

15. The manufacturing method according to claim 1 , wherein the cavity has a depth ranging from 1 to 1.5 μm.

16. The manufacturing method according to claim 1 , wherein, a material of the first electrode and the second electrode comprises molybdenum, and

a material of the piezoelectric layer comprises aluminum nitride.

17. The manufacturing method according to claim 1 , wherein the first electrode has a thickness ranging from 0.5 to 0.8 μm, and

the second electrode has a thickness less than or equal to 0.5 μm.

18. The manufacturing method according to claim 1 , wherein the MEMS device comprises a film bulk acoustic wave filter.

19. A MEMS device comprising:

a CMOS circuit;

a MEMS module being located on the CMOS circuit which is coupling to the MEMS module and configured to drive the MEMS module, wherein,

the MEMS module comprises:

a protective layer on the CMOS circuit, the protective layer has a first contact hole and the second contact hole;

a cavity being located in the protective layer;

a first electrode being located on the protective layer and the cavity, which is electrically coupling to the CMOS circuit and covers the cavity;

a piezoelectric layer being located on the first electrode and above the cavity;

a second electrode being located on the piezoelectric layer and being electrically coupling to the CMOS circuit; and

a through hole being located in the protective layer or in the first electrode to reach the cavity,

wherein the piezoelectric layer exposes the through hole,

the CMOS circuit comprises: a plurality of second interconnecting holes in a second dielectric layer, and a plurality of second interconnecting leads which has one end in one of the plurality of second interconnecting holes and the other end extending into the first contact hole and the second contact hole,

the first electrode is electrically coupling to the CMOS circuit through the first contact hole, and the second electrode is electrically coupling to the CMOS circuit through the second contact hole.

20. The MEMS device according to claim 19 ,

a part of the first electrode is located in the first contact hole,

a part of the second electrode is located in the second contact hole.

21. The MEMS device according to claim 19 , wherein the CMOS circuit comprises:

a substrate;

a first transistor and a second transistor being located on the substrate;

a first dielectric layer being located on the first transistor and on the second transistor;

a plurality of first interconnecting leads being located on the first dielectric layer;

the second dielectric layer being located on the plurality of first interconnecting leads; and

the plurality of second interconnecting leads being located on the second dielectric layer.

22. The MEMS device according to claim 21 , wherein, the first dielectric layer has a plurality of first interconnecting holes, and each of the first interconnecting leads contact the first transistor or the second transistor through one of the plurality of first interconnecting holes,

each of the plurality of second interconnecting leads has one end connecting with one of the plurality of first interconnecting leads through one of the plurality of second interconnecting holes.

23. The MEMS device according to claim 22 , wherein the first transistor and the second transistor are coupling by one of the plurality of first interconnecting leads.

24. The MEMS device according to claim 19 , wherein the protective layer has an etching ratio greater than that of silicon dioxide.

25. The MEMS device according to claim 19 , wherein a material of the protective layer comprises silicon nitride.

26. The MEMS device according to claim 19 , wherein the protective layer has a thickness greater than 2 μm.

27. The MEMS device according to claim 19 , wherein the cavity has a depth ranging from 1 to 1.5 μm.

28. The MEMS device according to claim 19 , wherein, a material of the first electrode and the second electrode comprises molybdenum, and

a material of the piezoelectric layer comprises aluminum nitride.

29. The MEMS device according to claim 19 , wherein, the first electrode has a thickness of 0.5 μm,

and the second electrode has a thickness less than 0.5 μm.

30. A MEMS device according to claim 19 , wherein the MEMS device is a film bulk acoustic wave filter.