Memory controller performing recovery operation, operating method of the same, and memory system including the same
A memory system for performing a recovery operation is provided. A memory system includes a memory device including a plurality of memory cells constituting a plurality of sub-sets, and a memory controller for controlling the memory device. The memory controller controls the memory device to manage a read count indicating a number of read operations performed by the memory device for each of the plurality of sub-sets, and to perform a recovery operation on a sub-set, among the plurality of sub-sets, based on the read count corresponding to the read count. Each of a plurality of sub-sets includes a plurality of pages. Each of the plurality of pages is a unit in which a read operation is performed in the plurality of memory cells.
1. A memory system comprising:
a memory device comprising a plurality of memory cells constituting a plurality of sub-sets; and
a memory controller configured to:
manage, for each of the plurality of sub-sets, a read count indicating a number of read operations performed by the memory device for the respective sub-set among the plurality of sub-sets,
identify a sub-set, among the plurality of sub-sets, which has the read count satisfying a criteria, and
perform a recovery operation on the identified sub-set,
wherein each of the plurality of sub-sets comprises a plurality of pages, and
wherein each of the plurality of pages is a unit in which a read operation is performed in the plurality of memory cells,
wherein the memory device is configured to provide a recovery pulse to the sub-set corresponding to the read count when the read count reaches a first reference value.
2. The memory system of claim 1 , wherein memory cells, among the plurality of memory cells, connected to a same word line are included in a same sub-set.
3. The memory system of claim 1 , wherein the memory controller is further configured to manage a write count for a number of write operations performed by the memory device in each of the plurality of sub-sets.
4. The memory system of claim 1 , wherein the recovery pulse has a different voltage level than a voltage level of a pulse for writing operation.
5. The memory system of claim 1 , wherein the recovery pulse has a different pulse duration than a pulse duration of a pulse for writing operation.
6. The memory system of claim 1 , wherein when the read count reaches a second reference value, the memory device is configured to read out data written in the sub-set corresponding to the read count and transmit the read data to the memory controller.
7. The memory system of claim 6 , wherein the memory controller is further configured to receive data read from the sub-set, correct an error in the received data, and transmit error correction data to the memory device.
8. The memory system of claim 7 , wherein the memory device is configured to write the error correction data to the sub-set corresponding to the read count.
9. The memory system of claim 8 , wherein the memory device is further configured to rewrite the error correction data in the memory cell even when the read data and the error correction data are the same.
10. The memory system of claim 8 , wherein the memory device is further configured to perform a data compare-write operation on the sub-set corresponding to the read count.
11. A method of operating a memory controller for controlling an operation of a memory device comprising a plurality of memory cells constituting a plurality of sub-sets, the method comprising:
transmitting a read command to the memory device;
increasing a read count for a sub-set, among the plurality of sub-sets, corresponding to the read command;
determining whether the read count of the sub-set satisfies a criteria; and
performing a recovery operation on the sub-set based on a result of the determination that the read count of the sub-set satisfies the criteria,
wherein the sub-set comprises a plurality of pages, and
wherein each of the plurality of pages is a unit in which a read operation is performed in the plurality of memory cells,
wherein the performing of the recovery operation comprises:
determining whether the read count reaches a second reference value;
transmitting a read command for the sub-set corresponding to the read count based on a determination that the read count reaches the second reference value;
correcting an error in data read from the sub-set; and
transmitting a rewrite command for the sub-set and the corrected data to the memory device to allow the corrected data to be rewritten to the sub-set.
12. The method of claim 11 , wherein the performing of the recovery operation comprises:
determining whether the read count reaches a first reference value; and
transmitting a recovery command to the memory device based on a determination that the read count reaches the first reference value.
13. The method of claim 11 , further comprising resetting the read count after the performing of the recovery operation is completed.
14. The method of claim 11 , further comprising confirming whether a request for the sub-set is received from a host,
wherein the recovery operation is performed when the request for the sub-set is not received.
15. The method of claim 11 , further comprising confirming whether a read request for the sub-set is received from a host,
wherein, when the read request for the sub-set is received, an operation according to the read request is performed after the recovery operation is performed.
16. The method of claim 11 , further comprising confirming whether a request for the sub-set is received from a host,
wherein, when the request for the sub-set other than a read request is received, the recovery operation is performed after an operation according to the request is performed.
17. A memory controller for controlling a memory device comprising a plurality of memory cells constituting a plurality of sub-sets, the memory controller comprising:
a memory configured to store one or more instruction; and
at least one processor configured to execute the one or more instructions to:
manage, for each of the plurality of sub-sets, a read count, which indicates a number of read commands transmitted to the memory device for the respective sub-set among the plurality of sub-sets,
identify a sub-set, among the plurality of sub-sets, which has the read count satisfying a criteria, output an instruction to perform a recovery operation the identified sub-set,
wherein each of the plurality of sub-sets comprises a plurality of pages, and
wherein each of the plurality of pages is a unit in which a read operation is performed in the plurality of memory cells,
wherein the at least one processor is further configured to:
transmit a recovery command to the memory device such that a recovery pulse is provided to the sub-set corresponding to the read count, based on a result of the determination that the read count reaches a first reference value, and
transmit a rewrite command such that data is rewritten in the sub-set, when the read count reaches a second reference value, and wherein the first reference value is less than the second reference value, and
wherein memory cells connected to the same word line among the plurality of memory cells are included in the same sub-set.