Thin film transistor structure and manufacturing method thereof, circuit structure, display substrate and display device

1. A thin film transistor structure, comprising:

a base plate, and a first thin film transistor and a second thin film transistor that are stacked on the base plate,

wherein the first thin film transistor and the second thin film transistor share a same active layer;

wherein the active layer comprises a first part and a second part intersecting with each other, an extending direction of the first part of the active layer is perpendicular to an extending direction of the second part of the active layer, and the active layer is in a cross shape;

wherein a source electrode and a drain electrode of the first thin film transistor are respectively connected to two end portions of the first part, a source electrode and a drain electrode of the second thin film transistor are respectively connected to two end portions of the second part; and the source electrode and the drain electrode of the first thin film transistor, and the source electrode and the drain electrode of the second thin film transistor are arranged at a same layer.

2. The thin film transistor structure according to claim 1 , wherein the first thin film transistor is a bottom-gate thin film transistor, and the second thin film transistor is a top-gate thin film transistor.

3. The thin film transistor structure according to claim 2 , wherein a gate electrode of the first thin film transistor is located below the active layer, and a gate electrode of the second thin film transistor is located above the active layer.

4. The thin film transistor structure according to claim 1 , wherein a gate electrode of the first thin film transistor extends in a direction parallel with an extending direction of the first part, and a gate electrode of the second thin film transistor extends in a direction parallel with an extending direction of the second part.

5. The thin film transistor structure according to claim 1 , further comprising: a first gate insulating layer located between the gate electrode of the first thin film transistor and the active layer, and a second gate insulating layer located between the gate electrode of the second thin film transistor and the active layer.

6. The thin film transistor structure according to claim 4 , wherein a channel width to length ratio of the first thin film transistor is adjusted by adjusting a width of the gate electrode of the first thin film transistor and a width of the first part of the active layer, and a channel width to length ratio of the second thin film transistor is adjusted by adjusting a width of the gate electrode of the second thin film transistor and a width of the second part of the active layer.

7. A display substrate, comprising the thin film transistor structure according to claim 1 ;

wherein the display substrate further comprises a first gate line and a second gate line, an extending direction of the first gate line is perpendicular to an extending direction of the second gate line;

a gate electrode of the first thin film transistor is electrically connected to the first gate line, and a gate electrode of the second thin film transistor is electrically connected to the second gate line.

8. A circuit structure, comprising the thin film transistor structure according to claim 1 ;

wherein the circuit structure comprises a Gate Driver on Array (GOA) or a pixel circuit of an organic light-emitting diode display component.

9. A display device, comprising a display substrate;

wherein the display substrate comprises a thin film transistor structure, a first gate line and a second gate line, an extending direction of the first gate line is perpendicular to an extending direction of the second gate line;

wherein the thin film transistor structure comprises a base plate, and a first thin film transistor and a second thin film transistor that are stacked on the base plate,

wherein the first thin film transistor and the second thin film transistor share a same active layer;

wherein the active layer comprises a first part and a second part intersecting with each other, an extending direction of the first part of the active layer is perpendicular to an extending direction of the second part of the active layer, and the active layer is in a cross shape;

wherein a source electrode and a drain electrode of the first thin film transistor are respectively connected to two end portions of the first part, a source electrode and a drain electrode of the second thin film transistor are respectively connected to two end portions of the second part; and the source electrode and the drain electrode of the first thin film transistor, and the source electrode and the drain electrode of the second thin film transistor are arranged at a same layer;

wherein a gate electrode of the first thin film transistor is electrically connected to the first gate line, and a gate electrode of the second thin film transistor is electrically connected to the second gate line.

10. A display device, comprising the circuit structure according to claim 8 ;

wherein the circuit structure comprises a Gate Driver on Array (GOA) or a pixel circuit of an organic light-emitting diode display component.

11. The display substrate according to claim 7 , wherein the first thin film transistor is a bottom-gate thin film transistor, and the second thin film transistor is a top-gate thin film transistor.

12. The display substrate according to claim 11 , wherein a gate electrode of the first thin film transistor is located below the active layer, and a gate electrode of the second thin film transistor is located above the active layer.

13. The display substrate according to claim 7 , wherein a gate electrode of the first thin film transistor extends in a direction parallel with an extending direction of the first part, and a gate electrode of the second thin film transistor extends in a direction parallel with an extending direction of the second part.

14. The display substrate according to claim 13 , wherein a channel width to length ratio of the first thin film transistor is adjusted by adjusting a width of the gate electrode of the first thin film transistor and a width of the first part of the active layer, and a channel width to length ratio of the second thin film transistor is adjusted by adjusting a width of the gate electrode of the second thin film transistor and a width of the second part of the active layer.

15. The circuit structure according to claim 8 , wherein the first thin film transistor is a bottom-gate thin film transistor, and the second thin film transistor is a top-gate thin film transistor.

16. The circuit structure according to claim 15 , wherein a gate electrode of the first thin film transistor is located below the active layer, and a gate electrode of the second thin film transistor is located above the active layer.

17. The circuit structure according to claim 8 , wherein a gate electrode of the first thin film transistor extends in a direction parallel with an extending direction of the first part, and a gate electrode of the second thin film transistor extends in a direction parallel with an extending direction of the second part.