IP Library Granted Patent US 11,316,030
Granted Patent B2
US 11,316,030 · App. 17/021,640 · Granted Apr 26, 2022

Fin field-effect transistor device and method

Inventors: Che-Lun Chang (Hsinchu, TW); Shiao-Shin Cheng (Hsinchu, TW); Ji-Yin Tsai (Zhudong Township, TW); Yu-Lin Tsai (Hsinchu, TW); Hsin-Chieh Huang (Hsinchu, TW); Ming-Yuan Wu (Hsinchu, TW); Jiun-Ming Kuo (Taipei, TW); Ming-Jie Huang (Hsinchu, TW); Yu-Wen Wang (New Taipei, TW); Che-Yuan Hsu (Hsinchu, TW)
Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
H01L29/66636H01L21/02236H01L21/02532H01L21/02661H01L29/0847H01L29/165H01L29/66795H01L29/7848H01L29/7851
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,316,030
App. No.
17/021,640
Granted
Apr 26, 2022
Kind
B2
Abstract

A method includes forming a doped region on a top portion of a substrate, forming a first epitaxial layer over the substrate, forming a recess in the first epitaxial layer, the recess being aligned to the doped region, performing a surface clean treatment in the recess, the surface clean treatment includes: oxidizing surfaces of the recess to form an oxide layer in the recess, and removing the oxide layer from the surfaces of the recess, and forming a second epitaxial layer in the recess.

Claims (51)

1. A method of forming a semiconductor device, the method comprising:

forming a doped region on a top portion of a substrate;

forming a first epitaxial layer over the substrate;

forming a recess in the first epitaxial layer, the recess being aligned to the doped region;

performing a surface clean treatment in the recess, the surface clean treatment comprises:

performing a plasma ashing process in the recess, wherein the plasma ashing process comprises exposing surfaces of the recess to a plasma that includes chlorine gas;

oxidizing the surfaces of the recess to form an oxide layer in the recess; and

removing the oxide layer from the surfaces of the recess; and

forming a second epitaxial layer in the recess.

2. The method of claim 1 , wherein forming the recess comprises etching the first epitaxial layer.

3. The method of claim 1 , wherein performing the surface clean treatment further comprises

removing contaminants from the surfaces of the recess.

4. The method of claim 1 , wherein exposing surfaces of the recess to the plasma reduces a surface roughness of the surfaces of the recess.

5. The method of claim 3 , wherein removing contaminants from the surfaces of the recess comprises a wet process that exposes the surfaces of the recess to sulfuric acid (H 2 SO 4 ), hydrogen peroxide (H 2 O 2 ), ammonium hydroxide (NH 4 OH), or combinations thereof.

6. The method of claim 1 , wherein oxidizing the surfaces of the recess comprises exposing the surfaces of the recess to a process gas comprising ozone (O 3 ).

7. The method of claim 1 , wherein removing the oxide layer comprises a wet etching process using dilute hydrofluoric acid (dHF).

8. The method of claim 1 , wherein the first epitaxial layer comprises a first material and the second epitaxial layer comprises a second material, wherein the first material has a different lattice constant than the second material.

9. A method of forming a semiconductor device, the method comprising:

forming a first doped region and a second doped region in a top portion of a substrate;

growing a first epitaxial layer over the first doped region and the second doped region;

etching the first epitaxial layer to form a recess, wherein the recess is aligned to the first doped region;

performing a surface clean treatment in the recess, the surface clean treatment comprises:

smoothening surfaces of the recess, wherein smoothening surfaces of the recess comprises performing a plasma ashing process on the surfaces of the recess, and wherein the plasma ashing process uses chlorine plasma;

removing particles from the surfaces of the recess using a wet clean process; and

removing portions of the first epitaxial layer from the recess, wherein removing the portions of the first epitaxial layer from the recess comprises:

forming an oxide layer in the portions of the first epitaxial layer in the recess; and

etching the oxide layer;

depositing a seed layer in the recess; and

growing a second epitaxial layer in the recess and over the seed layer.

10. The method of claim 9 , wherein the first doped region and the second doped region are oppositely doped.

11. The method of claim 9 , further comprising:

forming a first fin, wherein the first fin comprises a first portion of the first doped region, a second portion of the first epitaxial layer, and a third portion of the second epitaxial layer; and

forming a second fin, wherein the second fin comprises a fourth portion of the second doped region and a fifth portion of the first epitaxial layer.

12. The method of claim 9 , wherein forming the seed layer comprises a deposition temperature in a range of 600° C. to 750° C.

13. The method of claim 9 , wherein growing the second epitaxial layer comprises a growth temperature in a range of 550° C. to 700° C.

14. The method of claim 9 , wherein a deposition temperature of the seed layer is higher than a growth temperature of the second epitaxial layer.

15. The method of claim 9 , wherein the plasma ashing process is performed at a temperature that is in a range from 20° C. to 90° C.

16. The method of claim 9 , wherein etching the oxide layer comprises an etching process that includes dilute hydrofluoric (dHF) acid.

17. A method of forming a semiconductor device, the method comprising:

etching a first semiconductor layer to form a recess, wherein the etching damages portions of the first semiconductor layer, the recess exposes the damaged portions of the first semiconductor layer;

performing a surface clean treatment in the recess, the surface clean treatment comprises:

exposing surfaces of the recess to a plasma, wherein the plasma comprises chlorine gas;

forming an oxide layer in the damaged portions of the first semiconductor layer; and

removing the oxide layer;

forming a seed layer in the recess; and

forming a second semiconductor layer in the recess.

18. The method of claim 17 further comprising:

forming an n-type doped region in a substrate; and

depositing the first semiconductor layer over the n-type doped region.

19. The method of claim 17 , wherein the seed layer comprises silicon, carbon doped silicon, silicon germanium, or a combination thereof.

20. The method of claim 17 , wherein forming an oxide layer comprises a dry process that exposes the surfaces of the recess to a process gas that comprises ozone ( 03 ), and removing the oxide layer comprises a wet process that etches the oxide layer using dilute hydrofluoric acid (dHF).

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 2, 2021
From: CHANG, CHE-LUN; CHENG, SHIAO-SHIN; TSAI, JI-YIN; TSAI, YU-LIN; HUANG, HSIN-CHIEH; WU, MING-YUAN; KUO, JIUN-MING; HUANG, MING-JIE; WANG, YU-WEN; HSU, CHE-YUAN
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 056741/0724 →
Continuity (2)
Provisional Application 62978756 · Feb 19, 2020
Related Publication 20210257479A1 · Aug 19, 2021