IP Library Granted Patent US 11,316,705
Granted Patent B1
US 11,316,705 · App. 16/949,386 · Granted Apr 26, 2022

Image sensors with a physical unclonable function

Inventor: Peter Spiessens (Werchter, BE)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H04L9/3278H04N5/378H04N5/379
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Quick Facts
Patent No.
US 11,316,705
App. No.
16/949,386
Granted
Apr 26, 2022
Kind
B1
Abstract

An image sensor may use a physical unclonable function (PUF) to generate a unique identifier that may be used for security. Physical unclonable functions utilize variations that occur during manufacturing to generate a unique identifier that may be used to generate a secure encryption key. In an image sensor, analog-to-digital converters may provide the foundation for the physical unclonable function. An image sensor may include an array of imaging pixels having rows and columns, a plurality of analog-to-digital converters, and processing circuitry that is configured to generate a unique identifier based on outputs from the plurality of analog-to-digital converters. The processing circuitry may concatenate one or more bits from test outputs from the analog-to-digital converters to generate the unique identifier.

Claims (38)

1. An image sensor comprising:

an array of imaging pixels having rows and columns;

a plurality of analog-to-digital converters, wherein each column of imaging pixels has a corresponding analog-to-digital converter of the plurality of analog-to-digital converters; and

processing circuitry that is configured to generate a unique identifier based on outputs from the plurality of analog-to-digital converters.

2. The image sensor defined in claim 1 , wherein the processing circuitry is configured to generate a cryptographic key using the unique identifier.

3. The image sensor defined in claim 1 , wherein each analog-to-digital converter has a respective output with a total number of bits and wherein generating the unique identifier based on the outputs from the plurality of analog-to-digital converters comprises using the total number of bits from the respective output of each analog-to-digital converter to generate the unique identifier.

4. The image sensor defined in claim 1 , wherein each analog-to-digital converter has a respective output with a total number of bits and wherein generating the unique identifier based on the outputs from the plurality of analog-to-digital converters comprises using less than the total number of bits from the respective output of each analog-to-digital converter to generate the unique identifier.

5. The image sensor defined in claim 1 , wherein each analog-to-digital converter has a respective output with a total number of bits and wherein generating the unique identifier based on the outputs from the plurality of analog-to-digital converters comprises using the total number of bits from less than all of the respective outputs to generate the unique identifier.

6. The image sensor defined in claim 1 , wherein each analog-to-digital converter has a respective output with a total number of bits and wherein generating the unique identifier based on the outputs from the plurality of analog-to-digital converters comprises using less than the total number of bits from less than all of the respective outputs to generate the unique identifier.

7. The image sensor defined in claim 1 , wherein generating the unique identifier based on the outputs from the plurality of analog-to-digital converters comprises concatenating bits from the outputs to form the unique identifier.

8. The image sensor defined in claim 1 , wherein the processing circuitry includes correlated multiple sampling circuitry that is configured to obtain multiple samples from a given analog-to-digital converter.

9. The image sensor defined in claim 1 , further comprising:

an analog test bus; and

a digital-to-analog converter configured to apply a test voltage to the analog test bus, wherein generating the unique identifier based on outputs from the plurality of analog-to-digital converters comprises generating the unique identifier based on outputs from the plurality of analog-to-digital converters that are obtained while the plurality of analog-to-digital converters receive the test voltage.

10. An image sensor having a unique identifier, the image sensor comprising:

an array of imaging pixels;

a plurality of analog-to-digital converters that are each configured to receive an analog signal from the array of imaging pixels;

an analog test bus that is configured to provide a test voltage to the plurality of analog-to-digital converters; and

unique identification generation circuitry that is configured to generate the unique identifier based on outputs from the plurality of analog-to-digital converters that are generated while the plurality of analog-to-digital converters receive the test voltage from the analog test bus.

11. The image sensor defined in claim 10 , further comprising:

correlated multiple sampling circuitry configured to, for each analog-to-digital converter of the plurality of analog-to-digital converters, obtain multiple samples at different times.

12. The image sensor defined in claim 11 , wherein the correlated multiple sampling circuitry is configured to, for each analog-to-digital converter of the plurality of analog-to-digital converters, average the multiple samples to obtain a single representative output for each analog-to-digital converter.

13. The image sensor defined in claim 12 , further comprising:

error correction circuitry configured to process the single representative outputs from the correlated multiple sampling circuitry.

14. The image sensor defined in claim 13 , wherein the unique identification generation circuitry is configured to receive the processed single representative outputs from the error correction circuitry and wherein generating the unique identifier based on the outputs from the plurality of analog-to-digital converters comprises generating the unique identifier based on the processed single representative outputs from the error correction circuitry.

15. A method of operating an image sensor, wherein the image sensor comprises an array of imaging pixels and a plurality of analog-to-digital converters coupled to the array of imaging pixels, the method comprising:

providing a test voltage to the plurality of analog-to-digital converters;

while providing the test voltage to the plurality of analog-to-digital converters, sampling outputs from the plurality of analog-to-digital converters; and

generating a unique security identifier based on the outputs from the plurality of analog-to-digital converters.

16. The method defined in claim 15 , wherein sampling outputs from the plurality of analog-to-digital converters comprises obtaining multiple samples from a single analog-to-digital converter of the plurality of analog-to-digital converters.

17. The method defined in claim 16 , further comprising:

averaging the multiple samples from the single analog-to-digital converter to obtain a representative output for the single analog-to-digital converter.

18. The method defined in claim 15 , further comprising:

for each analog-to-digital converter, subtracting a first magnitude of an output for that analog-to-digital converter from a second magnitude of the test voltage to obtain an error value for that analog-to-digital converter, wherein generating the unique security identifier based on the outputs from the plurality of analog-to-digital converters comprises generating the unique security identifier based on the error values.

19. The method defined in claim 18 , further comprising:

before generating the unique security identifier based on the error values, performing additional processing on the error values.

20. The method defined in claim 15 , further comprising:

generating a cryptographic key using the unique security identifier.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL 055315, FRAME 0350 Recorded Aug 17, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064618/0881 →
SECURITY INTEREST Recorded Feb 17, 2021
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 055315/0350 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 28, 2020
From: SPIESSENS, PETER
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 054238/0409 →