IP Library › Granted Patent US 11,321,094
Granted Patent B2
US 11,321,094 · App. 17/210,559 · Granted May 3, 2022

Non-transitory computer-readable medium, assembly instruction conversion method and information processing apparatus

Inventor: Kentaro Kawakami (Kawasaki, JP)
Assignee: FUJITSU LIMITED
G06F9/3838G06F8/4441G06F9/30098G06F9/4552
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Quick Facts
Patent No.
US 11,321,094
App. No.
17/210,559
Granted
May 3, 2022
Kind
B2
Abstract

A non-transitory computer-readable medium having stored therein a program for causing a computer to execute a process. The process includes storing a plurality of generation instructions in a storage area for each of a plurality of first assembly instructions, each generation instruction instructing the generation of a machine language of a second assembly instruction that executes processing equivalent to each first assembly instruction, and generating machine languages of a plurality of second assembly instructions so that the machine languages of the second assembly instructions having a dependency relationship do not appear adjacent to each other, according to the plurality of generation instructions in the storage area.

Claims (34)

1. A non-transitory computer-readable medium having stored therein a program for causing a computer to execute a process, the process comprising:

storing a plurality of generation instructions in a storage area for each of a plurality of first assembly instructions, each generation instruction instructing the generation of a machine language of a second assembly instruction that executes processing equivalent to each first assembly instruction; and

generating machine languages of a plurality of second assembly instructions so that the machine languages of the second assembly instructions having a dependency relationship do not appear adjacent to each other, according to the plurality of generation instructions in the storage area.

2. The non-transitory computer-readable medium as claimed in claim 1 , wherein

the first assembly instruction is an assembly instruction included in a first instruction set, and

the second assembly instruction is an assembly instruction included in a second instruction set different from the first instruction set.

3. The non-transitory computer-readable medium as claimed in claim 2 , wherein

the generation instructions are stored in the storage area by calling a function a plurality of times, where a register of the first instruction set corresponding to a register of the second instruction set is specified as an argument of the function, while changing the resister specified as the argument every time the function is called.

4. The non-transitory computer-readable medium as claimed in claim 1 , wherein

the dependency relationship indicates a relationship in which the second assembly instructions use a same register.

5. The non-transitory computer-readable medium as claimed in claim 4 , wherein

the processing equivalent to the first assembly instruction is executed by the plurality of second assembly instructions that use the same register specified in an operand.

6. The non-transitory computer-readable medium as claimed in claim 3 , wherein

the machine language is generated for each of a plurality of groups, each group including the plurality of second assembly instructions that use mutually different registers.

7. The non-transitory computer-readable medium as claimed in claim 1 , wherein

the storage area is a FIFO (First In First Out) buffer, and

the generating the machine languages is performed in order from the generation instruction first stored in the FIFO buffer among the generation instructions.

8. A non-transitory computer-readable medium having stored therein a program for causing a computer to execute a process, the process comprising:

generating a plurality of machine languages of a plurality of second assembly instructions for each of a plurality of first assembly instructions, the plurality of second assembly instructions executing processing equivalent to each first assembly instruction; and

sorting the plurality of machine languages so that the machine languages of the second assembly instructions having a dependency relationship do not appear adjacent to each other.

9. The non-transitory computer-readable medium as claimed in claim 8 , wherein

the sorting the plurality of machine languages is executed when a first dummy function described before a function generating the machine languages and a second dummy function described after the function are detected.

10. The non-transitory computer-readable medium as claimed in claim 9 , wherein

each of the first assembly instructions is an assembly instruction included in a first instruction set,

each of the second assembly instructions is an assembly instruction included in a second instruction set different front the first instruction set, and

each of the machine language of the first dummy function and the machine language of the second dummy function is not defined in the second instruction set.

11. An assembly instruction conversion method for causing a computer to execute a process, the process comprising:

storing a plurality of generation instructions in a storage area for each of a plurality of first assembly instructions, each generation instruction instructing the generation of a machine language of a second assembly instruction that executes processing equivalent to each first assembly instruction; and

generating machine languages of a plurality of second assembly instructions so that the machine languages of the second assembly instructions having a dependency relationship do not appear adjacent to each other, according to the plurality of generation instructions in the storage area.

12. An information processing apparatus comprising:

a memory including a storage area;

a processor coupled to the memory, and the processor configured to:

store a plurality of generation instructions in a storage area for each of a plurality of first assembly instructions, each generation instruction instructing the generation of a machine language of a second assembly instruction that executes processing equivalent to each first assembly instruction; and

generate machine languages of a plurality of second assembly instructions so that the machine languages of the second assembly instructions having a dependency relationship do not appear adjacent to each other, according to the plurality of generation instructions in the storage area.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 24, 2021
From: KAWAKAMI, KENTARO
To: FUJITSU LIMITED
Reel/Frame 055695/0369 →
Priority Claims (1)
JP JP2020-125185 · Jul 22, 2020 · national
Continuity (1)
Related Publication 20220027161A1 · Jan 27, 2022