Semiconductor device including storage node electrode including step and method of manufacturing the semiconductor device
A semiconductor device may include a bottom sub-electrode on a substrate, a top sub-electrode on the bottom sub-electrode, a dielectric layer covering the bottom and top sub-electrodes, and a plate electrode on the dielectric layer. The top sub-electrode may include a step extending from a side surface thereof, which is adjacent to the bottom sub-electrode, to an inner portion of the top sub-electrode. The top sub-electrode may include a lower portion at a level that is lower than the step and an upper portion at a level which is higher than the step. A maximum width of the lower portion may be narrower than a minimum width of the upper portion. The maximum width of the lower portion may be narrower than a width of a top end of the bottom sub-electrode. The bottom sub-electrode may include a recess in a region adjacent to the top sub-electrode.
1. A semiconductor device comprising:
a substrate;
a bottom sub-electrode on the substrate, a region of the bottom sub-electrode including a recess;
a top sub-electrode on the bottom sub-electrode,
the top sub-electrode including a step extending from a side surface thereof,
the step of the top sub-electrode being adjacent to the bottom sub-electrode and to an inner portion of the top sub-electrode,
the top sub-electrode including a lower portion at a level lower than the step of the top sub-electrode and an upper portion at a level higher than the step of the top sub-electrode,
a maximum width of the lower portion of the top sub-electrode being narrower than a minimum width of the upper portion of the top sub-electrode,
the maximum width of the lower portion of the top sub-electrode being narrower than a width of a top end of the bottom sub-electrode, and
the top sub-electrode being adjacent to the region of the bottom sub-electrode including the recess;
a dielectric layer covering the bottom sub-electrode and the top sub-electrode; and
a plate electrode on the dielectric layer.
2. The semiconductor device of claim 1 , wherein the recess in the region of the bottom sub-electrode has a concave shape.
3. The semiconductor device of claim 1 , wherein
the region of the bottom sub-electrode has a trapezoidal shape, and
a width thereof is progressively narrowed in an upward direction.
4. The semiconductor device of claim 1 , further comprising:
a lower supporter pattern contacting a side surface of the bottom sub-electrode; and
an upper supporter pattern contacting a side surface of the top sub-electrode.
5. The semiconductor device of claim 4 , wherein
the lower supporter pattern includes a round side surface contacting the recess in the region of the bottom sub-electrode.
6. The semiconductor device of claim 4 , wherein the lower supporter pattern further includes an overhang vertically overlapping the bottom sub-electrode.
7. The semiconductor device of claim 4 , wherein the top sub-electrode contacts a top surface of the bottom sub-electrode and a top surface of the lower supporter pattern.
8. The semiconductor device of claim 1 , wherein
the top sub-electrode further includes a downward protrusion between an inclined surface of the bottom sub-electrode and the dielectric layer, and
the downward protrusion of the top sub-electrode extends in a downward direction from a bottom end thereof.
9. The semiconductor device of claim 1 , wherein the plate electrode further includes:
a bottom plate electrode covering the dielectric layer; and
a top plate electrode covering the bottom plate electrode.
10. The semiconductor device of claim 9 , wherein the bottom plate electrode further includes a side protrusion portion extending toward the top sub-electrode.
11. The semiconductor device of claim 1 , wherein the bottom sub-electrode has a pillar or cylindrical shape.
12. The semiconductor device of claim 11 , wherein the top sub-electrode has a pillar or cylindrical shape.
13. A semiconductor device comprising:
a substrate;
a storage node electrode on the substrate,
the storage node electrode including a bottom sub-electrode and a top sub-electrode on the bottom sub-electrode,
the top sub-electrode including a step in a side surface thereof adjacent to the bottom sub-electrode, and
the bottom sub-electrode including a recess in a side surface thereof adjacent to the top sub-electrode;
a dielectric layer covering a surface of the storage node electrode;
a plate electrode on the dielectric layer; and
a supporter pattern covering a portion of a side surface of the storage node electrode, the supporter pattern including a lower supporter pattern contacting the recess of the bottom sub-electrode.
14. The semiconductor device of claim 13 , wherein a top surface of the bottom sub-electrode and a top surface of the lower supporter pattern are coplanar.
15. The semiconductor device of claim 13 , wherein the bottom sub-electrode includes:
an external bottom sub-electrode including the recess; and
an internal bottom sub-electrode including an inclined surface.
16. The semiconductor device of claim 15 , wherein the top sub-electrode includes:
an external top sub-electrode on the external bottom sub-electrode; and
an internal top sub-electrode on the internal bottom sub-electrode, the internal top sub-electrode including a downward protrusion portion covering a portion of the inclined surface.