IP Library › Granted Patent US 11,322,607
Granted Patent B2
US 11,322,607 · App. 17/100,142 · Granted May 3, 2022

Semiconductor device

Inventor: Ryo Maeta (Matsumoto, JP)
Assignee: FUJI ELECTRIC CO., LTD.
H01L29/7811H01L29/0619H01L29/0634H01L29/0638H01L29/1095H01L29/66333H01L29/66712H01L29/7395H01L29/7802H01L29/7813
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Quick Facts
Patent No.
US 11,322,607
App. No.
17/100,142
Granted
May 3, 2022
Kind
B2
Abstract

A semiconductor device has an active region through which current flows and a termination structure region. At a front surface of a semiconductor substrate of a first conductivity type, a first semiconductor layer of the first conductivity type is provided. At a surface of the first semiconductor layer, a lower parallel pn structure is provided. At a surface of the lower parallel pn structure, an upper parallel pn structure is provided in the termination structure region and a first semiconductor region of a second conductivity type is provided in the active region. A width of an upper second column is wider than a width of a lower second column. An interval between the upper second columns is wider than an interval between the lower second columns. A thickness of the upper second column is thicker than a thickness of the first semiconductor region.

Claims (31)

1. A semiconductor device, comprising:

an active region through which current flows;

a termination structure region disposed outside the active region and in which a termination structure is provided surrounding a periphery of the active region;

a first semiconductor layer of a first conductivity type provided at a front surface of a semiconductor substrate of a first conductivity type, the first semiconductor layer having an impurity concentration that is lower than an impurity concentration of the semiconductor substrate;

a lower parallel pn structure provided at a surface of the first semiconductor layer and in which a lower first column of the first conductivity type and a lower second column of a second conductivity type are disposed to alternate repeatedly in a plane parallel to the front surface;

an upper parallel pn structure provided at a surface of the lower parallel pn structure in the termination structure region and in which an upper first column of the first conductivity type and an upper second column of the second conductivity type are electrically connected with the lower second column and are disposed to alternate repeatedly in a plane parallel to the front surface; and

a first semiconductor region of the second conductivity type and provided at a surface of the lower parallel pn structure in the active region,

wherein

a width of the upper second column is wider than a width of the lower second column, and an interval between upper second columns is wider than an interval between lower second columns,

a thickness of the upper second column is thicker than a thickness of the first semiconductor region,

a lower surface of the upper first column is at least partially in contact with upper surfaces of adjacent lower first columns,

the thickness of the upper second column is a distance from an upper surface of the upper second column to a lower surface of the upper second column which is at least partially in contact with the upper surfaces of adjacent lower first columns, and

the thickness of the first semiconductor region is a distance from an upper surface of the first semiconductor region to a lower surface of the first semiconductor region which is in contact with the surface of the lower parallel pn structure in the active region.

2. The semiconductor device according to claim 1 , wherein

the thickness of the upper second column is 2.5 times to 6 times the thickness of the first semiconductor region.

3. The semiconductor device according to claim 1 , wherein

the width of the upper second column is 1.25 times to 3 times the width of the lower second column, and

the interval between the upper second columns is at least 1.25 times and less than 3 times the interval between the lower second columns.

4. The semiconductor device according to claim 1 , wherein

the upper second column has a ring-shape surrounding the active region.

5. A semiconductor device, comprising:

an active region through which current flows;

a termination structure region disposed outside the active region and in which a termination structure is provided surrounding a periphery of the active region;

a first semiconductor layer of a first conductivity type provided at a front surface of a semiconductor substrate of a first conductivity type, the first semiconductor layer having an impurity concentration that is lower than an impurity concentration of the semiconductor substrate;

a lower parallel pn structure provided at a surface of the first semiconductor layer and in which a lower first column of the first conductivity type and a lower second column of a second conductivity type are disposed to alternate repeatedly in a plane parallel to the front surface;

an upper parallel pn structure provided at a surface of the lower parallel pn structure in the termination structure region and in which an upper first column of the first conductivity type and an upper second column of the second conductivity type are electrically connected with the lower second column and are disposed to alternate repeatedly in a plane parallel to the front surface; and

a first semiconductor region of the second conductivity type and provided at a surface of the lower parallel pn structure in the active region,

wherein

a width of the upper second column is wider than a width of the lower second column, and an interval between upper second columns is wider than an interval between lower second columns,

a thickness of the upper second column is thicker than a thickness of the first semiconductor region, and

the thickness of the upper second column is 2.5 times to 6 times the thickness of the first semiconductor region.

Priority Claims (1)
JP JP2017-235612 · Dec 7, 2017 · national
Continuity (2)
Division 16169040 · Oct 24, 2018
Related Publication 20210074847A1 · Mar 11, 2021