Amplification circuit, radio-frequency front end circuit, and communication device
An amplification circuit includes: an amplifier including a transistor that is connected between an input terminal and an output terminal; an input matching network that is connected between the input terminal and an input side of the amplifier and converts an impedance from a low impedance to a high impedance; a limiter circuit that is connected between a node between the input matching network and the input side of the amplifier, and ground and includes two diodes connected in opposite directions to each other; and a capacitor that is connected in series with the limiter circuit between the node and ground.
1. An amplification circuit comprising:
an amplifier comprising a transistor that is connected between an input terminal and an output terminal;
an input matching network that is connected between the input terminal and an input of the amplifier, and that is configured to convert a low impedance to a high impedance;
a limiter circuit that is connected between ground and a node between the input matching network and the input of the amplifier, and that comprises two diodes connected in opposite directions in parallel with each other; and
a first capacitor that is connected in series with the limiter circuit between the node and ground,
wherein the node is on a signal path that connects the input matching network to the input of the amplifier,
wherein the input matching network comprises:
a second capacitor that is on a path connecting the input terminal and the node; and
a first inductor that is connected between the path and ground, and
wherein the input matching network further comprises a third capacitor that is connected in series with the first inductor between the first inductor and ground.
2. The amplification circuit according to claim 1 , wherein a node between the first inductor and the third capacitor is a bias terminal.
3. The amplification circuit according to claim 2 , wherein a bias voltage is supplied to the bias terminal via a resistor or inductor.
4. The amplification circuit according to claim 2 , wherein a limit voltage of the limiter circuit is greater than or equal to a bias voltage supplied to the bias terminal.
5. The amplification circuit according to claim 2 , wherein a bias voltage supplied to the bias terminal is variable.
6. The amplification circuit according to claim 1 , wherein a resonant frequency of the first inductor and the third capacitor together is less than an operation frequency band of the amplification circuit.
7. The amplification circuit according to claim 6 , wherein the resonant frequency is greater than half a frequency of the operation band.
8. The amplification circuit according to claim 1 , further comprising:
a parallel resonant circuit that is on a path connecting the input matching network and the node, and that comprises a second inductor and a fourth capacitor connected in parallel with each other.
9. A radio-frequency front end circuit comprising:
a filter;
a switch that is connected to the filter; and
the amplification circuit according to claim 1 that is connected to the filter via the switch.
10. A communication device comprising:
a radio-frequency (RF) signal processing circuit that is configured to process a radio-frequency signal transmitted or received by an antenna; and
the radio-frequency front end circuit according to claim 9 that is configured to transmit the radio-frequency signal between the antenna and the RF signal processing circuit.