IP Library › Granted Patent US 11,334,272
Granted Patent B2
US 11,334,272 · App. 16/871,710 · Granted May 17, 2022

Memory system and operating method thereof

Inventor: Eu-Joon Byun (Gyeonggi-do, KR)
Assignee: SK hynix Inc.
G06F3/0647G06F3/0604G06F3/064G06F3/0659G06F3/0673G06F12/124G06F2212/1044G06F2212/7211
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Quick Facts
Patent No.
US 11,334,272
App. No.
16/871,710
Granted
May 17, 2022
Kind
B2
Abstract

A memory system includes: a memory device including memory blocks for storing data; and a controller suitable for controlling the memory device to increase a first read count for a logical address in a read command corresponding to a read request received from a host, move first data indicated by the logical address from a first memory block to a second memory block among the memory blocks when the first read count is greater than a first threshold value, increase a second read count of the first memory block, and perform a read reclaim operation on the first memory block when the second read count is greater than a second threshold value.

Claims (37)

1. A memory system, comprising:

a memory device including memory blocks for storing data; and

a controller suitable for controlling the memory device to:

increase a first read count for a logical address corresponding to a read command from a host, wherein the first read count counts a number of times that first data associated with the logical address is read,

move the first data indicated by the logical address from at least one page in a first memory block to a second memory block among the memory blocks when the first read count is greater than a first threshold value,

increase a second read count corresponding to the first memory block, wherein the second read count counts a number of times that the first memory block is read, and

perform a read reclaim operation on the first memory block when the second read count is greater than a second threshold value.

2. The memory system of claim 1 , wherein the memory blocks are grouped into a plurality of super memory blocks, each of which includes a plurality of memory blocks, and

wherein the controller controls the memory device to move the first data and second data stored at a same offset as the first data within a first super memory block, to a second super memory block according to an interleaving scheme.

3. The memory system of claim 2 , wherein the second data are valid data.

4. The memory system of claim 3 , wherein each of the first read counts for logical addresses respectively corresponding to the valid data is greater than a third threshold value, and

the third threshold value is less than the first threshold value.

5. The memory system of claim 1 , wherein the controller increases the second read count whenever data stored in the first memory block are read.

6. The memory system of claim 1 , wherein the controller increases the first read count for a particular logical address whenever a read command containing the particular logical address is received.

7. The memory system of claim 1 , wherein the controller stores a table that records first read counts for respective logical addresses, and resets the first read count for a particular logical address when data corresponding to the particular logical address is moved to another memory block.

8. The memory system of claim 7 , wherein when the number of logical addresses recorded in the table reaches a fourth threshold value, the controller evicts one or more of the logical addresses recorded in the table according to a Least Recently Used (LRU) scheme.

9. The memory system of claim 1 , wherein the read reclaim operation is an operation of moving valid data in the first memory block to the second memory block.

10. The memory system of claim 2 , wherein the interleaving scheme moves the second data to the second super memory block while moving the first data to the second super memory block.

11. A method for operating a memory system, comprising:

increasing a first read count for a logical address corresponding to a read command from an external source, wherein the first read count counts a number of times that first data associated with the logical address is read;

moving the first data indicated by the logical address from at least one page in a first memory block to a second memory block when the first read count is greater than a first threshold value;

increasing a second read count corresponding to the first memory block, wherein the second read count counts a number of times that the first memory block is read; and

performing a read reclaim operation on the first memory block when the second read count is greater than a second threshold value.

12. The method of claim 11 , wherein the moving of the first data includes moving the first data and second data, which are stored at the same offset as the first data, to a second super memory block including the second memory block according to an interleaving scheme.

13. The method of claim 12 , wherein the second data are valid data.

14. The method of claim 13 , wherein each of the first read counts for logical addresses respectively corresponding to the valid data is greater than a third threshold value, which is less than the first threshold value.

15. The method of claim 11 , further comprising: increasing the second read count whenever data stored in the first memory block is read.

16. The method of claim 11 , further comprising: increasing the first read count for a particular logical address whenever a read command containing the particular logical address is received.

17. The method of claim 11 , further comprising:

storing a table that records first read counts for respective logical addresses, and resetting the first read count for a particular logical address when data corresponding to the particular logical address is moved to another memory block.

18. The method of claim 17 , further comprising evicting one or more of the logical addresses recorded in the table according to a Least Recently Used (LRU) scheme when the number of logical addresses recorded in the table reaches a fourth threshold value.

19. The method of claim 11 , wherein the read reclaim operation is performed by moving valid data in the first memory block to the second memory block.

20. An operating method of a controller for controlling a memory device including first and second super blocks, the first super block having a stripe configured by pages, the operating method comprising:

counting read-accesses to the first super block to generate a first read-access count and counting read-accesses to the respective pages to generate a second read-access count, wherein the second read-access count counts a number of times that first data associated with the logical address is read and the first read-access count counts a number of times that the first memory block is read;

moving, when the second read-access count for one of the pages becomes greater than a first threshold, the first data from the stripe to the second super block; and

controlling, when the first read-access count for the first super block becomes greater than a second threshold, the memory device to perform a read reclaim operation on the first super block,

wherein each of the second read-access counts of the pages storing the valid data is greater than a third threshold which is less than the first threshold.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 11, 2020
From: BYUN, EU-JOON
To: SK HYNIX INC.
Reel/Frame 052626/0396 →
Priority Claims (1)
KR 10-2019-0121655 · Oct 1, 2019 · national
Continuity (1)
Related Publication 20210096761A1 · Apr 1, 2021