IP Library › Granted Patent US 11,335,256
Granted Patent B2
US 11,335,256 · App. 16/759,334 · Granted May 17, 2022

Pixel circuit, display panel and method for improving low gray-level uniformity for display panel

Inventors: Shuai Zhou (Shenzhen, CN); Yan Xue (Shenzhen, CN); Baixiang Han (Shenzhen, CN)
Assignee: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
G09G3/3233G09G2300/088G09G2300/0842G09G2320/0219G09G2320/0233G09G2320/0295
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Quick Facts
Patent No.
US 11,335,256
App. No.
16/759,334
Granted
May 17, 2022
Kind
B2
Abstract

A pixel circuit, a display panel and a method for improving low gray-level uniformity for a display panel are provided. A feedthrough effect can be effectively reduced by increasing resistance value of a resistor line between a source of a switching thin-film transistor and a gate of a driving thin-film transistor. Low gray-level uniformity of the display panel is improved. Quality of the display panel is enhanced.

Claims (17)

1. A pixel circuit, comprising:

a first thin-film transistor, a gate of the first thin-film transistor directly connected to a first node, a drain of the first thin-film transistor receiving a power supply voltage, a source of the first thin-film transistor being an output end of a driving signal;

a second thin-film transistor, the gate of the second thin-film transistor directly connected to a writing signal line, the drain of the second thin-film transistor directly connected to a data signal line, the source of the second thin-film transistor directly connected to a second node;

a resistor line, directly connected between the first node and the second node;

a parasitic capacitor, a first end of the parasitic capacitor directly connected to the writing signal line, a second end of the parasitic capacitor directly connected to the second node;

a storage capacitor, the first end of the storage capacitor directly connected to the first node, the second end of the storage capacitor directly connected to a third node;

a light-emitting element, an anode of the light-emitting element directly connected to the third node, a cathode of the light-emitting element directly connected to a common ground voltage of the circuit;

a third thin-film transistor, the gate of the third thin-film transistor directly connected to the writing signal line, the source of the third thin-film transistor directly connected to the third node, the drain of the third thin-film transistor directly connected to a monitoring signal line,

wherein a resistance value of the resistor line ranges from 900 to 1200 kΩ.

2. The pixel circuit according to claim 1 , wherein a formula of resistance value of the resistor line is R=ρ1/s, where R is the resistance value, ρ is electrical resistivity and s is a cross-sectional area of the resistor line.

3. The pixel circuit according to claim 1 , wherein the first thin-film transistor, the second thin-film transistor and the third thin-film transistor are any one of a low temperature poly-silicon thin-film transistor, an oxide semiconductor thin-film transistor and an amorphous-silicon (a-Si) thin-film transistor.

4. A display panel, comprising the pixel circuit according to claim 1 , wherein low gray-level uniformity obtained during the display panel displays images is proportional to resistance value of the resistor line.

5. A method for improving low gray-level uniformity for a display panel, comprising:

providing the display panel according to claim 4 ; and

inputting a low voltage level signal to the writing signal line, switching off a writing signal of the writing signal line, lowering a voltage of the source of the second thin-film transistor, and discharging electricity of a storage capacitor to the source of the second thin-film transistor.

6. The method according to claim 5 , wherein when the source of the second thin-film transistor undergoes the discharging, the resistor line generates an instantaneous current, resistance value of the resistor line increases, a divided voltage of the resistor line increases, a speed of discharging electricity of the storage capacitor is slowed down, and a decrease of a voltage of the first node becomes small.

7. The method according to claim 5 , wherein when a decrease of the voltage of the first node becomes small, a voltage between the first node and the second node maintains stable and a current flowing through a light-emitting element maintains stable.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 12, 2020
From: ZHOU, SHUAI; XUE, YAN; HAN, BAIXIANG
To: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
Reel/Frame 052630/0569 →
Priority Claims (1)
CN 202010107884.6 · Feb 21, 2020 · national
Continuity (1)
Related Publication 20210407407A1 · Dec 30, 2021