System and method for parallel testing of electronic device

1. A method for testing voltage monitor circuits in a device, the method comprising:

setting voltage monitor circuits to test mode;

setting a monitor reference in each voltage monitor circuit to a respective targeted threshold voltage using a corresponding trim code stored in a non-transitory memory storage of the device;

ramping a voltage provided to a subset of voltage monitor circuits from a first voltage to a second voltage using a test voltage supply, voltages between the first voltage and the second voltage corresponding with targeted threshold voltages of the subset of voltage monitor circuits;

determining for each voltage monitor circuit in the subset of voltage monitor circuits a voltage value of the test voltage supply resulting in a change in a logic state at an output of a corresponding voltage monitor circuit; and

verifying for each voltage monitor circuit in the subset of voltage monitor circuits that the determined voltage value for the each voltage monitor circuit corresponds to the respective targeted threshold voltage of an associated voltage monitor circuit and, based thereon, indicating whether the trim code is set correctly.

2. The method of claim 1 , wherein the second voltage is a voltage greater than the first voltage and corresponding to a ramping up of the test voltage supply.

3. The method of claim 1 , wherein the first voltage is a voltage greater than the second voltage and corresponding to a ramping down of the test voltage supply.

4. The method of claim 1 , wherein, in each voltage monitor circuit, the monitor reference is compared to the voltage provided from the test voltage supply using a comparator circuit, the change in the logic state corresponding to a change in a digital state of an output of the comparator circuit.

5. The method of claim 1 , further comprising setting an operating temperature of the voltage monitor circuits to a minimum operating temperature or a maximum operating temperature of the device before ramping the voltage provided to the subset of voltage monitor circuits.

6. The method of claim 1 , wherein the subset of voltage monitor circuits comprises minimum voltage detectors, low voltage detectors, high voltage detectors, or upper voltage detectors.

7. The method of claim 1 , wherein each voltage monitor circuit comprises a multiplexer having a first input coupled to the test voltage supply and a second input coupled to a functional voltage supply, the functional voltage supply providing a voltage monitored by the voltage monitor circuit during functional mode.

8. A device, comprising:

a plurality of voltage monitor circuits, each voltage monitor circuit comprising an associated monitor reference;

a non-transitory memory storage comprising instructions;

a processor in communication with the non-transitory memory storage, wherein the processor is configured to execute the instructions to:

set the voltage monitor circuits to test mode;

set the associated monitor reference in each voltage monitor circuit to a respective targeted threshold voltage using a corresponding trim code;

set an operating temperature of the voltage monitor circuits to a minimum operating temperature or a maximum operating temperature of the device;

ramp a voltage provided to a subset of voltage monitor circuits from a first voltage to a second voltage using a test voltage supply, voltages between the first voltage and the second voltage corresponding with targeted threshold voltages of the subset of voltage monitor circuits;

determine for each voltage monitor circuit in the subset of voltage monitor circuits a voltage value of the test voltage supply resulting in a change in a logic state at an output of a corresponding voltage monitor circuit; and

verify that the determined voltage value for each voltage monitor circuit in the subset of voltage monitor circuits corresponds to the respective targeted threshold voltage of an associated voltage monitor circuit and, based thereon, indicate whether or not the trim code is set correctly.

9. The device of claim 8 , wherein the second voltage is a voltage greater than the first voltage and corresponding to a ramping up of the test voltage supply.

10. The device of claim 8 , wherein the first voltage is a voltage greater than the second voltage and corresponding to a ramping down of the test voltage supply.

11. The device of claim 8 , wherein the associated monitor reference is compared to the voltage provided from the test voltage supply in each voltage monitor circuit using a comparator circuit, the change in the logic state corresponding to a change in a digital state of an output of the comparator circuit.

12. The device of claim 8 , wherein a trim code for each voltage monitor circuit is stored in the non-transitory memory storage, the setting the associated monitor reference in each voltage monitor circuit comprises setting the monitor reference with a corresponding trim code from the non-transitory memory storage.

13. A device comprising:

a plurality of voltage monitor circuits configured to operate in a test mode setting;

a non-transitory-memory storage comprising instructions and a trim code for each voltage monitor circuit;

a processor in communication with the voltage monitor circuits and the non-transitory memory storage, wherein the instructions when executed by the processor, cause the processor to:

set an associated monitor reference in each voltage monitor circuit to a respective targeted threshold voltage using a corresponding trim code stored in the non-transitory memory storage;

ramp a voltage provided to a subset of voltage monitor circuits from a first voltage to a second voltage using a test voltage supply, voltages between the first voltage and the second voltage corresponding with targeted threshold voltages of the subset of voltage monitor circuits;

determine for each voltage monitor circuit in the subset of voltage monitor circuits a voltage value of the test voltage supply resulting in a change in a logic state at an output of a corresponding voltage monitor circuit; and

verify that the determined voltage value for each voltage monitor circuit in the subset of voltage monitor circuits corresponds to the respective targeted threshold voltage of an associated voltage monitor circuit and, based thereon, indicating whether or not the trim code is set correctly.

14. The device of claim 13 , wherein the second voltage is a voltage greater than the first voltage and corresponding to a ramping up of the test voltage supply.

15. The device of claim 13 , wherein the first voltage is a voltage greater than the second voltage and corresponding to a ramping down of the test voltage supply.

16. The device of claim 13 , wherein the associated monitor reference is compared to the voltage provided from the test voltage supply in each voltage monitor circuit using a comparator circuit, the change in the logic state corresponding to a change in a digital state of an output of the comparator circuit.

17. The device of claim 13 , wherein the test mode setting further comprises setting an operating temperature of the voltage monitor circuits to a minimum operating temperature or a maximum operating temperature of the device before ramping the voltage provided to the subset of voltage monitor circuits.

18. The device of claim 8 , wherein each voltage monitor circuit comprises a multiplexer having a first input coupled to the test voltage supply and a second input coupled to a functional voltage supply, the functional voltage supply providing a voltage monitored by the voltage monitor circuit during functional mode.

19. The device of claim 8 , wherein the subset of voltage monitor circuits comprises minimum voltage detectors, low voltage detectors, high voltage detectors, or upper voltage detectors.

20. The device of claim 13 , wherein the subset of voltage monitor circuits comprises minimum voltage detectors, low voltage detectors, high voltage detectors, or upper voltage detectors.