IP Library › Granted Patent US 11,342,195
Granted Patent B1
US 11,342,195 · App. 17/167,199 · Granted May 24, 2022

Methods for anisotropic etch of silicon-based materials with selectivity to organic materials

Inventors: Yun Han (Albany, NY); Peter Ventzek (Austin, TX); Alok Ranjan (Austin, TX)
Assignee: TOKYO ELECTRON LIMITED
H01L21/32137H01L21/02118H01L21/02274H01L21/3065H01L21/30655H01L21/31116H01L21/31138H01L21/31144H01L21/32136
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Quick Facts
Patent No.
US 11,342,195
App. No.
17/167,199
Granted
May 24, 2022
Kind
B1
Abstract

Improved process flows and methods are provided that use a cyclic dry process to transfer a pattern from a patterned organic layer to an underlying silicon-containing layer. The cyclic dry process disclosed herein includes a deposition step, an etch step and a purge step, which may be repeated a number of cycles to progressively etch the exposed portions of the silicon-containing layer. Unlike conventional pattern transfer processes, the cyclic dry process described herein anisotropically etches the silicon-containing layer with high selectivity to the patterned organic layer. In doing so, the disclosed process improves pattern transfer performance and avoids problems typically seen in conventional pattern transfer processes such as, e.g., CD enlargement, CD distortion and/or complete loss of photoresist.

Claims (38)

1. A method for patterning a substrate, the method comprising:

forming one or more underlying layers on the substrate, wherein the one or more underlying layers comprise a silicon-containing layer;

forming a patterned organic layer over the silicon-containing layer;

performing a cyclic dry process to remove exposed portions of the silicon-containing layer not covered by the patterned organic layer and transfer a pattern from the patterned organic layer to the silicon-containing layer, wherein the cyclic dry process includes a deposition step comprising a first source power level and an etch step, the etch step utilizing a pulsed plasma and comprising a second source power level less than the first source power level; and

repeating the cyclic dry process.

2. The method of claim 1 , wherein the cyclic dry process comprises:

as part of the deposition step, depositing a polymer layer onto a surface of the substrate by exposing the substrate to a first plasma while the substrate is disposed within a processing chamber;

as part of the etch step, etching the polymer layer and the exposed portions of the silicon-containing layer by exposing the substrate to a second plasma while the substrate is disposed within the processing chamber, wherein the second plasma utilizes the pulsed plasma;

as part of a purge step, purging the processing chamber to remove byproducts of said etching from the processing chamber; and

repeating the deposition, etch and purge steps a number of cycles and/or until the exposed portions of the silicon-containing layer are completely removed.

3. The method of claim 2 , wherein the first plasma comprises a hydrocarbon gas chemistry, a fluorocarbon gas chemistry, or a CH x F y gas chemistry.

4. The method of claim 2 , wherein the deposition step is performed using process conditions which generate a radical-rich first plasma, which provides deposition of the polymer layer onto top and sidewalls surfaces of the patterned organic layer.

5. The method of claim 4 , wherein the deposition of the polymer layer reduces or prevents lateral damage to the patterned organic layer during the etch step.

6. The method of claim 2 , wherein the second plasma comprises NF 3 , CF 4 , or SF 6 gas chemistry.

7. The method of claim 2 , wherein the etch step is performed using pulsed bias power to form the pulsed plasma.

8. The method of claim 2 , wherein a short pulse of low bias power is used near the end of the etch step to control ion energy of ions in the second plasma and provide anisotropic etching of the exposed portions of the silicon-containing layer.

9. The method of claim 2 , wherein the purge step is performed by supplying an inert gas to the processing chamber at high chamber pressure to provide rapid removal of etch byproducts.

10. The method of claim 2 , wherein the processing chamber is not purged between the deposition step and the etch step.

11. The method of claim 1 , wherein the second source power level is less than about 200 W.

12. A method for patterning a substrate, the method comprising:

forming one or more underlying layers on the substrate, wherein the one or more underlying layers comprise a silicon-containing layer;

forming a patterned organic layer over the silicon-containing layer;

depositing a polymer layer onto a surface of the substrate by exposing the substrate to a first plasma while the substrate is disposed within a processing chamber;

etching the polymer layer and exposed portions of the silicon-containing layer not covered by the patterned organic layer by exposing the substrate to a second plasma while the substrate is disposed within the processing chamber, wherein the second plasma includes the use of a pulsed bias power;

purging the processing chamber after said etching by supplying an inert gas to the processing chamber to remove byproducts of said etching from the processing chamber; and

repeating the depositing, etching and purging steps a number of cycles and/or until the exposed portions of the silicon-containing layer are completely removed.

13. The method of claim 12 , wherein the first plasma comprises a hydrocarbon gas chemistry, fluorocarbon gas chemistry, or a CHxFy gas chemistry, and wherein the second plasma comprises NF 3 , CF 4 , or SF 6 gas chemistry.

14. The method of claim 12 , wherein the depositing step is performed using process conditions that generate a radical-rich first plasma, which provides deposition of the polymer layer onto top and sidewall surfaces of the patterned organic layer.

15. The method of claim 14 , wherein the deposition of the polymer layer reduces or prevents lateral damage to the patterned organic layer during the etching step.

16. The method of claim 12 , wherein the pulsed bias power has a duty cycle of 20% or less.

17. The method of claim 12 , wherein the pulsed bias power is used near the end of the etching step to control ion energy of ions in the second plasma and provide anisotropic etching of the exposed portions of the silicon-containing layer.

18. The method of claim 12 , wherein the purging step is performed by supplying the inert gas to the processing chamber at high chamber pressure to provide rapid removal of etch byproducts.

19. The method of claim 12 , wherein the processing chamber is not purged between the depositing step and the etching step.

20. A method for patterning a substrate, the method comprising:

forming one or more underlying layers on the substrate, wherein the one or more underlying layers comprise a silicon-containing layer;

forming a patterned organic layer over the silicon-containing layer;

performing a cyclic dry process to remove exposed portions of the silicon-containing layer not covered by the patterned organic layer and transfer a pattern from the patterned organic layer to the silicon-containing layer, wherein the cyclic dry process includes a deposition step and an etch step, the etch step utilizing a pulsed plasma and comprising no bias power during the first half of the etch step; and

repeating the cyclic dry process.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 4, 2021
From: HAN, YUN; VENTZEK, PETER; RANJAN, ALOK
To: TOKYO ELECTRON LIMITED
Reel/Frame 055144/0621 →
Cited By (2)
US 12,224,160 US 12,666,893