Stateful virtual compute system
A system for providing a stateful virtual compute system is provided. The system may be configured to maintain a plurality of virtual machine instances. The system may be further configured to receive a request to execute a program code and select a virtual machine instance to execute the program code on the selected virtual machine instance. The system may further associate the selected virtual machine instance with shared resources and allow program codes executed in the selected virtual machine instance to access the shared resources.
1. A system, comprising:
one or more hardware computing devices configured to execute specific computer-executable instructions to at least:
detect a first event, wherein the first event is configured to cause a first stateful code execution;
initiate the first stateful code execution using first compute capacity, wherein the first compute capacity is associated with a shared resource in a first state, and wherein the first stateful code execution is configured to cause the first state of the shared resource to be modified during the first stateful code execution using the first compute capacity to a second state of the shared resource different from the first state of the shared resource;
detect a second event, wherein the second event is configured to cause a second stateful code execution; and
subsequent to the first stateful code execution using the first compute capacity, initiate the second stateful code execution using one of the first compute capacity used for the first stateful code execution or second compute capacity different from the first compute capacity used for the first stateful code execution, wherein the second stateful code execution is configured to access, during the second stateful code execution using one of the first compute capacity used for the first stateful code execution or the second compute capacity different from the first compute capacity used for the first stateful code execution, the second state of the shared resource.
2. The system of claim 1 , wherein the shared resource is a shared memory that is accessible by both the first stateful code execution and the second stateful code execution.
3. The system of claim 1 , wherein the first event comprises a receipt of a Hypertext Transfer Protocol (HTTP) request identifying a program code to be executed as part of the first stateful code execution.
4. The system of claim 1 , wherein the first event is a file upload configured to trigger the first stateful code execution.
5. The system of claim 1 , wherein the one or more hardware computing devices are further configured to cause the first state of the shared resource modified by the first stateful code execution to be stored in multiple geographic locations.
6. The system of claim 1 , wherein the first stateful code execution is performed on first physical hardware located in a first geographic location, and the second stateful code execution is performed on second physical hardware located in a second geographic location different from the first geographic location.
7. The system of claim 1 , wherein the first stateful code execution comprises execution of a first program code, and the second stateful code execution comprises execution of a second program code different from the first program code.
8. The system of claim 1 , wherein the first stateful code execution and the second stateful code execution both comprise execution of the same program code.
9. The system of claim 8 , wherein the first stateful code execution and the second stateful code execution comprise execution of two different copies of the same program code.
10. The system of claim 8 , wherein the first stateful code execution and the second stateful code execution comprise execution of the same copy of the same program code.
11. The system of claim 1 , wherein the one or more hardware computing devices are further configured to initiate the second stateful code execution after the first stateful code execution is completed.
12. The system of claim 1 , wherein the one or more hardware computing devices are further configured to initiate the second stateful code execution before the first stateful code execution is completed.
13. A computer-implemented method, as implemented by one or more computing devices configured with specific executable instructions, the computer-implemented method comprising:
detecting a first event, wherein the first event is configured to cause a first stateful code execution;
initiating the first stateful code execution using first compute capacity, wherein the first compute capacity is associated with a shared resource in a first state, and wherein the first stateful code execution is configured to cause the first state of the shared resource to be modified during the first stateful code execution using the first compute capacity to a second state of the shared resource different from the first state of the shared resource;
detecting a second event, wherein the second event is configured to cause a second stateful code execution; and
subsequent to the first stateful code execution using the first compute capacity, initiating the second stateful code execution using one of the first compute capacity used for the first stateful code execution or second compute capacity different from the first compute capacity used for the first stateful code execution, wherein the second stateful code execution is configured to access, during the second stateful code execution using one of the first compute capacity used for the first stateful code execution or the second compute capacity different from the first compute capacity used for the first stateful code execution, the second state of the shared resource.
14. The computer-implemented method of claim 13 , wherein the shared resource is a shared memory that is accessible by both the first stateful code execution and the second stateful code execution.
15. The computer-implemented method of claim 13 , wherein the first stateful code execution comprises execution of a first program code, and the second stateful code execution comprises execution of a second program code different from the first program code.
16. The computer-implemented method of claim 13 , further comprising initiating the second stateful code execution before the first stateful code execution is completed.
17. Non-transitory physical computer storage storing instructions that, when executed by a computing system, cause the computing system to perform operations comprising:
detecting a first event, wherein the first event is configured to cause a first stateful code execution;
initiating the first stateful code execution using first compute capacity, wherein the first compute capacity is associated with a shared resource in a first state, and wherein the first stateful code execution is configured to cause the first state of the shared resource to be modified during the first stateful code execution using the first compute capacity to a second state of the shared resource different from the first state of the shared resource;
detecting a second event, wherein the second event is configured to cause a second stateful code execution; and
subsequent to the first stateful code execution using the first compute capacity, initiating the second stateful code execution using one of the first compute capacity used for the first stateful code execution or second compute capacity different from the first compute capacity used for the first stateful code execution, wherein the second stateful code execution is configured to access, during the second stateful code execution using one of the first compute capacity used for the first stateful code execution or the second compute capacity different from the first compute capacity used for the first stateful code execution, the second state of the shared resource.
18. The non-transitory physical computer storage of claim 17 , wherein the shared resource is a shared memory that is accessible by both the first stateful code execution and the second stateful code execution.
19. The non-transitory physical computer storage of claim 17 , wherein the first stateful code execution comprises execution of a first program code, and the second stateful code execution comprises execution of a second program code different from the first program code.
20. The non-transitory physical computer storage of claim 17 , storing further instructions that, when executed by the computing system, cause the computing system to perform operations comprising initiating the second stateful code execution before the first stateful code execution is completed.