IP Library › Granted Patent US 11,362,014
Granted Patent B2
US 11,362,014 · App. 16/884,403 · Granted Jun 14, 2022

Power module

Inventors: Chun-Kai Liu (Hsinchu, TW); Yao-Shun Chen (Xinpu Township, TW); Po-Kai Chiu (Taoyuan, TW)
Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
H01L23/3735H01L23/3107H01L23/3736H01L23/4334H01L24/32H05K7/209H01L24/19H01L24/82H01L2224/29099
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Quick Facts
Patent No.
US 11,362,014
App. No.
16/884,403
Granted
Jun 14, 2022
Kind
B2
Abstract

A power module including a circuit board, a chip, a first heat-conduction and insulation substrate and a second heat-conduction and insulation substrate is provided. The circuit board includes a board and a metal block embedded in the board and exposed from a first surface and a second surface of the board opposite to one another. The chip is disposed on a side of the second surface of the board corresponding to the metal block, and the chip is electrically and thermally connected to the metal block. The first heat-conduction and insulation substrate is located on a side of the first surface of the board to be disposed on the circuit board. The second heat-conduction and insulation substrate is electrically and thermally connected to the chip.

Claims (25)

1. A power module comprising:

a circuit board comprising a board and a metal block embedded in the board and exposed from a first surface and a second surface of the board opposite to one another;

a chip disposed on a side of the second surface of the board corresponding to the metal block, and the chip electrically and thermally connected to the metal block;

a first heat-conduction and insulation substrate located on a side of the first surface of the board to be disposed on the circuit board; and

a second heat-conduction and insulation substrate electrically and thermally connected to the chip.

2. The power module according to claim 1 , wherein the circuit board has a first circuit region and a second circuit region adjacent to one another, the chip is disposed in the first circuit region, and a cross-sectional area of circuit in the second circuit region is larger than a cross-sectional area of circuit in the first circuit region.

3. The power module according to claim 2 , wherein the circuit board further comprises a gate driver circuit layer disposed on the second surface of the board and electrically connected to the chip, and the gate driver circuit layer is located in the first circuit region.

4. The power module according to claim 2 , wherein the circuit board further comprises a power circuit layer electrically connected to the chip for providing the chip with power, and the power circuit layer is located in the second circuit region.

5. The power module according to claim 4 , wherein the power circuit layer comprises a first surface terminal and a second surface terminal respectively disposed on the first surface and the second surface of the board.

6. The power module according to claim 5 , wherein the first heat-conduction and insulation substrate comprises a first conductive layer electrically connected to the first surface terminal and the metal block.

7. The power module according to claim 6 , wherein the circuit board further comprises a metal layer correspondingly disposed between the metal block and the first conductive layer, and a height of the metal layer from the first surface of the board is consistent with a thickness of the first surface terminal.

8. The power module according to claim 7 , wherein the metal block and the metal layer are integrally formed.

9. The power module according to claim 5 , wherein the second heat-conduction and insulation substrate comprises a second conductive layer electrically connected to the second surface terminal and the chip.

10. The power module according to claim 9 , wherein the circuit board further comprises a local metal layer correspondingly disposed between the metal block and the chip so as to adjust a height of the chip from the second surface of the board consistent with a thickness of the second surface terminal.

11. The power module according to claim 1 , wherein the chip is a power chip.

12. The power module according to claim 1 , further comprising a temperature sensor located on the side of the second surface of the board to be disposed on the circuit board.

13. The power module according to claim 1 , wherein the power module has a first side and a second side opposite to one another, and further comprises:

a first lead frame disposed on the first side of the power module and electrically connected to the chip;

a second lead frame disposed on the second side of the power module and electrically connected to the chip; and

a third lead frame disposed on the second side of the power module and electrically connected to the chip.

14. The power module according to claim 13 , wherein the second heat-conduction and insulation substrate comprises a second conductive layer, and the second lead frame is electrically connected to the chip via the second conductive layer.

15. The power module according to claim 13 , wherein the first heat-conduction and insulation substrate comprises a first conductive layer, and the third lead frame is electrically connected to the chip via the first conductive layer.

16. The power module according to claim 13 , wherein the circuit board further comprises a gate driver circuit layer disposed on the second surface of the board and electrically connected to the chip, and the first lead frame is electrically connected to the chip via the gate driver circuit layer.

17. The power module according to claim 15 , further comprising another chip electrically and thermally connected between the metal block and the first conductive layer.

18. The power module according to claim 13 , wherein the number of the chip is plural, the circuit board further comprises a local metal layer correspondingly disposed between the metal block and the chips so as to adjust heights of the chips from the second surface of the board consistent with one another.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 28, 2020
From: LIU, CHUN-KAI; CHEN, YAO-SHUN; CHIU, PO-KAI
To: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
Reel/Frame 052772/0114 →
Priority Claims (1)
TW 109100025 · Jan 2, 2020 · national
Continuity (1)
Related Publication 20210210407A1 · Jul 8, 2021
Cited By (1)
US 12,256,514