IP Library › Granted Patent US 11,366,760
Granted Patent B2
US 11,366,760 · App. 16/817,384 · Granted Jun 21, 2022

Memory access collision management on a shared wordline

Inventors: Abdelhakim Alhussien (San Jose, CA); Jiangang Wu (Milpitas, CA); Karl D. Schuh (Santa Cruz, CA); Qisong Lin (El Dorado Hills, CA); Jung Sheng Hoei (Newark, CA)
Assignee: Micron Technology, Inc.
G06F12/0882G06F9/30047G06F9/30098G06F9/4418G06F12/0246G11C11/4085
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Quick Facts
Patent No.
US 11,366,760
App. No.
16/817,384
Granted
Jun 21, 2022
Kind
B2
Abstract

A processing device in a memory sub-system sends a program command to the memory device to cause the memory device to initiate a program operation on a corresponding wordline and sub-block of a memory array of the memory device. The processing device further receives a request to perform a read operation on data stored on the wordline and sub-block of the memory array, sends a suspend command to the memory device to cause the memory device to suspend the program operation, reads data corresponding to the read operation from a page cache of the memory device, and sends a resume command to the memory device to cause the memory device to resume the program operation.

Claims (70)

1. A system comprising:

a memory device; and

a processing device, operatively coupled with the memory device, to perform operations comprising:

sending a program command to the memory device to cause the memory device to initiate a program operation on a corresponding wordline and sub-block of a memory array of the memory device;

receiving a request to perform a read operation on the memory device;

determining that the request to perform the read operation is directed to data stored on the wordline and sub-block of the memory array on which the program operation was initiated;

responsive to determining that the request to perform the read operation is directed to data stored on the wordline and sub-block of the memory array on which the program operation was initiated, sending a suspend command to the memory device to cause the memory device to suspend the program operation;

reading data corresponding to the read operation from a page cache of the memory device; and

sending a resume command to the memory device to cause the memory device to resume the program operation.

2. The system of claim 1 , wherein, in response to the program command, the memory device is configured to:

read one or more previously programmed pages from the wordline and sub-block of the memory array; and

store the one or more previously programmed pages in the page cache of the memory device.

3. The system of claim 2 , wherein the data corresponding to the read operation comprises at least a portion of the one or more previously programmed pages.

4. The system of claim 1 , wherein the processing device to perform further operations comprising:

determining whether the program operation can be suspended; and

in response to determining that the program operation cannot be suspended, reading the data corresponding to the read operation after the program operation is complete.

5. The system of claim 1 , wherein the processing device to perform further operations comprising:

determining whether the data corresponding to the read operation is present in a cache register of the page cache;

in response to determining that the data corresponding to the read operation is present in the cache register, reading the data corresponding to the read operation from the cache register; and

sending the data corresponding to the read operation to a host system.

6. The system of claim 5 , wherein the processing device to perform further operations comprising:

in response to determining that the data corresponding to the read operation is not present in the cache register, determining whether the data corresponding to the read operation is present in a data register of the page cache; and

in response to determining that the data corresponding to the read operation is present in the data register, copying the data corresponding to the read operation from the data register to the cache register.

7. The system of claim 6 , wherein the processing device to perform further operations comprising:

in response to determining that the data corresponding to the read operation is not present in the data register, performing the read operation on the memory array of the memory device.

8. The system of claim 1 , wherein reading data corresponding to the read operation from a page cache of the memory device comprises:

determining whether the data corresponding to the read operation is present in a cache register of the page cache;

in response to determining that the data corresponding to the read operation is present in the cache register, reading the data corresponding to the read operation from the cache register; and

in response to determining that the data corresponding to the read operation is not present in the cache register, copying the data corresponding to the read operation from the data register to the cache register.

9. A method comprising:

sending a program command to a memory device to cause the memory device to initiate a program operation on a corresponding wordline and sub-block of a memory array of the memory device;

receiving a request to perform a read operation on the memory device;

determining that the request to perform the read operation is directed to data stored on the wordline and sub-block of the memory array on which the program operation was initiated;

responsive to determining that the request to perform the read operation is directed to data stored on the wordline and sub-block of the memory array on which the program operation was initiated, sending a suspend command to the memory device to cause the memory device to suspend the program operation;

reading data corresponding to the read operation from a page cache of the memory device; and

sending a resume command to the memory device to cause the memory device to resume the program operation.

10. The method of claim 9 , wherein, in response to the program command, the memory device is configured to:

read one or more previously programmed pages from the wordline and sub-block of the memory array; and

store the one or more previously programmed pages in the page cache of the memory device.

11. The method of claim 10 , wherein the data corresponding to the read operation comprises at least a portion of the one or more previously programmed pages.

12. The method of claim 9 , further comprising:

determining whether the program operation can be suspended; and

in response to determining that the program operation cannot be suspended, reading the data corresponding to the read operation after the program operation is complete.

13. The method of claim 9 , further comprising:

determining whether the data corresponding to the read operation is present in a cache register of the page cache;

in response to determining that the data corresponding to the read operation is present in the cache register, reading the data corresponding to the read operation from the cache register; and

sending the data corresponding to the read operation to a host system.

14. The method of claim 13 , further comprising:

in response to determining that the data corresponding to the read operation is not present in the cache register, determining whether the data corresponding to the read operation is present in a data register of the page cache; and

in response to determining that the data corresponding to the read operation is present in the data register, copying the data corresponding to the read operation from the data register to the cache register.

15. The method of claim 14 , further comprising:

in response to determining that the data corresponding to the read operation is not present in the data register, performing the read operation on the memory array of the memory device.

16. A system comprising:

a memory device; and

a processing device, operatively coupled with the memory device, to perform operations comprising:

receiving a read command associated with a read operation on the memory device;

determining that a program operation is currently on-going on the memory device;

determining whether the read operation and the program operation are directed to a same wordline and sub-block of a memory array of the memory device; and

in response to determining that the read operation and the program operation are directed to the same wordline and sub-block, reading data corresponding to the read operation from a page cache of the memory device while the program operation is on-going.

17. The system of claim 16 , wherein the processing device to perform further operations comprising:

in response to determining that the read operation and the program operation are not directed to the same wordline and sub-block, suspending the program operation;

reading the data corresponding to the read operation from the memory array; and

resuming the program operation after the read operation is completed.

18. The system of claim 16 , wherein the processing device to perform further operations comprising:

receiving a program command associated with the program operation; and

programming data corresponding to the program operation to the memory array of the memory device.

19. The system of claim 18 , wherein programming the data corresponding to the program operations comprises:

reading one or more previously programmed pages from the wordline and sub-block of the memory array; and

storing the one or more previously programmed pages in the page cache of the memory device.

20. The system of claim 19 , wherein the data corresponding to the read operation comprises at least a portion of the one or more previously programmed pages.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 8, 2020
From: ALHUSSIEN, ABDELHAKIM; WU, JIANGANG; SCHUH, KARL D.; LIN, QISONG; HOEI, JUNG SHENG
To: MICRON TECHNOLOGY, INC.
Reel/Frame 052345/0441 →
Continuity (1)
Related Publication 20210286731A1 · Sep 16, 2021
Cited By (1)
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