Dual metal wrap-around contacts for semiconductor devices
A semiconductor device includes a first raised feature in a NFET region on a substrate, a first n-type doped epitaxial semiconductor material grown on the first raised feature, the first n-type doped epitaxial material having a first upward facing surface and a first downward facing surface, a first contact metal on the first downward facing surface, and a second contact metal on the first upward facing surface. The device further includes a second raised feature in a PFET region on the substrate, a second p-type doped epitaxial semiconductor material grown on the second raised feature, the second p-type doped epitaxial material having a second upward facing surface and a second downward facing surface, a third contact metal on the second downward facing surface, and a fourth contact metal on the second upward facing surface, wherein the fourth contact metal is different from the second contact metal.
1. A semiconductor device, comprising:
a first raised feature in a n-type channel field effect transistor (NFET) region on a substrate;
a first n-type doped epitaxial semiconductor material grown on the first raised feature, the first n-type doped epitaxial semiconductor material having a first upward facing surface and a first downward facing surface;
a first contact metal on the first downward facing surface;
a second contact metal on the first upward facing surface;
a second raised feature in a p-type channel field effect transistor (PFET) region on the substrate;
a second p-type doped epitaxial semiconductor material grown on the second raised feature, the second p-type doped epitaxial semiconductor material having a second upward facing surface and a second downward facing surface;
a third contact metal on the second downward facing surface; and
a fourth contact metal on the second upward facing surface, wherein the fourth contact metal is different from the second contact metal, and wherein the first contact metal is different from the third contact metal.
2. The device of claim 1 , wherein the first n-type doped epitaxial semiconductor material contains Si:P or Si:As, the first contact metal contains Ti, and the second contact metal contains Ti or TiSi x .
3. The device of claim 1 , wherein the second p-type doped epitaxial semiconductor material contains Ge:B on SiGe:B, the third contact metal contains Ru, and the fourth contact metal contains NiPt or Ru.
4. The device of claim 1 , wherein the first and second raised features are Si fins that extend through a shallow trench isolation (STI) layer.
5. A semiconductor device, comprising:
a first raised feature in a n-type channel field effect transistor (NFET) region on a substrate;
a first n-type doped epitaxial semiconductor material grown on the first raised feature, the first n-type doped epitaxial semiconductor material having a first upward facing surface and a first downward facing surface;
a first contact metal on the first downward facing surface;
a second contact metal on the first upward facing surface;
a second raised feature in a p-type channel field effect transistor (PFET) region on the substrate;
a second p-type doped epitaxial semiconductor material grown on the second raised feature, the second p-type doped epitaxial semiconductor material having a second upward facing surface and a second downward facing surface;
a third contact metal on the second downward facing surface; and
a fourth contact metal on the second upward facing surface, wherein the fourth contact metal is different from the second contact metal, the first contact metal is different from the third contact metal, and the first n-type doped epitaxial semiconductor material contains Si:P or Si:As, the first contact metal contains Ti, and the second contact metal contains Ti or TiSi x .
6. The device of claim 5 , wherein the second p-type doped epitaxial semiconductor material contains Ge:B on SiGe:B, the third contact metal contains Ru, and the fourth contact metal contains NiPt or Ru.
7. The device of claim 5 , wherein the first and second raised features are Si fins that extend through a shallow trench isolation (STI) layer.
8. A semiconductor device, comprising:
a first raised feature in a n-type channel field effect transistor (NFET) region on a substrate;
a first n-type doped epitaxial semiconductor material grown on the first raised feature, the first n-type doped epitaxial semiconductor material having a first upward facing surface and a first downward facing surface;
a first contact metal on the first downward facing surface;
a second contact metal on the first upward facing surface;
a second raised feature in a p-type channel field effect transistor (PFET) region on the substrate;
a second p-type doped epitaxial semiconductor material grown on the second raised feature, the second p-type doped epitaxial semiconductor material having a second upward facing surface and a second downward facing surface;
a third contact metal on the second downward facing surface; and
a fourth contact metal on the second upward facing surface, wherein the fourth contact metal is different from the second contact metal, the first contact metal is different from the third contact metal, and the second p-type doped epitaxial semiconductor material contains Ge:B on SiGe:B, the third contact metal contains Ru, and the fourth contact metal contains NiPt or Ru.
9. The device of claim 8 , wherein the first n-type doped epitaxial semiconductor material contains Si:P or Si:As, the first contact metal contains Ti, and the second contact metal contains Ti or TiSi x .
10. The device of claim 8 , wherein the first and second raised features are Si fins that extend through a shallow trench isolation (STI) layer.