Feed-forward XOR physical unclonable functions
An apparatus includes a first feed-forward PUF, a second feed-forward PUF and an exclusive-or circuit configured to perform an exclusive-or operation of an output of the first feed-forward PUF and an output of the second feed-forward PUF.
1. An apparatus comprising:
a first feed-forward PUF;
a second feed-forward PUF; and
an exclusive-or circuit configured to perform an exclusive-or operation involving an output of the first feed-forward PUF together with an output of the second feed-forward PUF.
2. The apparatus of claim 1 wherein the first feed-forward PUF has a same structure as the second feed-forward PUF.
3. The apparatus of claim 1 wherein the first feed-forward PUF has a different structure from the second feed-forward PUF.
4. The apparatus of claim 3 wherein the first feed-forward PUF has a different number of intermediate arbiters than the second feed-forward PUF.
5. The apparatus of claim 3 wherein the first feed-forward PUF has a different configuration of feed-forward loops than the second feed-forward PUF.
6. The apparatus of claim 1 further comprising additional feed-forward PUFs, each having an output that is included in the exclusive-or operation.
7. The apparatus of claim 1 wherein the first feed-forward PUF has a modified feed-forward loop.
8. The apparatus of claim 1 wherein an output of the exclusive-or operation is a response to a challenge applied to the first feed-forward PUF and the second feed-forward PUF.
9. A method comprising:
executing a first feed-forward PUF to produce a first response;
executing a second feed-forward PUF to produce a second response;
applying the first response and the second response at a same time to an exclusive-or circuit to produce an XOR response.
10. The method of claim 9 wherein executing the first feed-forward PUF and executing the second feed-forward PUF comprises applying a same challenge to the first feed-forward PUF and the second feed-forward PUF.
11. The method of claim 9 wherein the first feed-forward PUF has a same structure as the second feed-forward PUF.
12. The method of claim 9 wherein the first feed-forward PUF has a different structure from the second feed-forward PUF.
13. The method of claim 12 wherein the first feed-forward PUF has a different number of intermediate arbiters than the second feed-forward PUF.
14. The method of claim 12 wherein the first feed-forward PUF has a different feed-forward loop configuration than the second feed-forward PUF.
15. The method of claim 9 wherein the first feed-forward PUF has a modified feed-forward loop.
16. The method of claim 9 wherein the XOR response is expected to be equal to a stored response less than one hundred percent of the time but more than a threshold percentage of time.
17. An integrated circuit comprising:
a plurality of feed-forward PUFs, each providing a separate response so as to provide a plurality of separate responses;
an exclusive-or circuit applying an exclusive-or operation to the plurality of separate responses to produce a single exclusive-or response for the plurality of separate responses, wherein the single exclusive-or response is equal to the exclusive-or of the plurality of separate responses.
18. The integrated circuit of claim 17 wherein each of the plurality of feed-forward PUFs has a same structure.
19. The integrated circuit of claim 17 wherein at least one of the plurality of feed-forward PUFs has a different structure from another of the plurality of feed-forward PUFs.
20. The integrated circuit of claim 17 wherein at least one of the plurality of feed-forward PUFs is a modified feed-forward PUF.