IP Library › Granted Patent US 11,378,659
Granted Patent B2
US 11,378,659 · App. 16/633,724 · Granted Jul 5, 2022

Light reception device and distance measurement module

Inventors: Yuji Isogai (Kanagawa, JP); Tsutomu Imoto (Kanagawa, JP); Takuya Maruyama (Kanagawa, JP); Takuro Murase (Kanagawa, JP); Ryota Watanabe (Kanagawa, JP); Toshifumi Wakano (Kanagawa, JP)
Assignee: Sony Semiconductor Solutions Corporation
G01S7/4816G01S17/08G01S17/89H01L27/1463H01L27/14623H01L27/14627H01L27/14629H01L27/14636G01S17/931
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Quick Facts
Patent No.
US 11,378,659
App. No.
16/633,724
Granted
Jul 5, 2022
Kind
B2
Abstract

The present technology relates to a light reception device and a distance measurement module. The light reception device includes an on-chip lens, a wiring layer, and a semiconductor layer between the on-chip lens and the wiring layer. The semiconductor layer includes a first tap to which a first voltage is applied and a first charge detection portion, and a second tap to which a second voltage different from the first voltage is applied and a second charge detection portion. The position of the on-chip lens differs depending upon an in-plane position of a pixel array section, so that an optical path length or a DC contrast of a chief ray from an object is uniform at in-plane pixels of the pixel array section. The present technology can be applied, for example, to a light reception device that generates distance information, for example, by a ToF method, and so forth.

Claims (70)

1. A light reception device, comprising:

an on-chip lens;

a wiring layer; and

a semiconductor layer arranged between the on-chip lens and the wiring layer, wherein

the semiconductor layer includes:

a first tap having a first voltage application portion to which a first voltage is applied and a first charge detection portion arranged around the first voltage application portion; and

a second tap having a second voltage application portion to which a second voltage different from the first voltage is applied and a second charge detection portion arranged around the second voltage application portion,

wherein the on-chip lens is configured such that a position thereof differs depending upon an in-plane position of a pixel array section, so that an optical path length or a DC contrast of a chief ray from an object is uniform at in-plane pixels of the pixel array section, and

wherein the first and second voltage application portions are configured from first and second transfer transistors formed from the semiconductor layer, respectively.

2. The light reception device according to claim 1 , wherein

the wiring layer includes at least one layer that includes a reflection member, and

the reflection member is provided so as to overlap with the first charge detection portion or the second charge detection portion as viewed in plan.

3. The light reception device according to claim 1 , wherein

the wiring layer includes at least one layer that includes a shading member, and

the shading member is provided so as to overlap with the first charge detection portion or the second charge detection portion as viewed in plan.

4. The light reception device according to claim 1 , wherein

an inter-pixel shading film is also configured such that a position thereof differs depending upon in-plane positions of the pixel array section together with the on-chip lens.

5. The light reception device according to claim 1 , further comprising:

a pixel separation portion provided at a pixel boundary portion and configured to separate neighboring pixels at least partially in a depthwise direction of the semiconductor layer.

6. The light reception device according to claim 5 , wherein

the pixel separation portion includes a DTI that separates the neighboring pixels from a rear face side or a front face side to a predetermined depth of the semiconductor layer.

7. The light reception device according to claim 5 , wherein

the pixel separation portion includes a through separation portion extending through the semiconductor layer to separate the neighboring pixel.

8. The light reception device according to claim 1 , wherein

the on-chip lens is configured such that the position thereof differs depending upon the in-plane position of the pixel array section, so that a phase displacement amount θ of a phase displacement detection tap that is one of the first tap or the second tap of each pixel is equal within a predetermined range.

9. The light reception device according to claim 1 , wherein

the on-chip lens is configured such that the position thereof differs depending upon the in-plane position of pixel array section, so that the DC contrast of the first tap and the DC contrast of the second tap are equal within a predetermined range.

10. The light reception device according to claim 1 , wherein

the on-chip lens is configured such that the position thereof differs depending upon the in-plane position of the pixel array section, so that a displacement amount of the DC contrast of the first tap at a central portion and an outer peripheral portion of the pixel array section and a displacement amount of the DC contrast of the second tap at a central portion and an outer peripheral portion of the pixel array section are equal within a predetermined range.

11. The light reception device according to claim 1 , wherein

the first and second voltage application portions are configured from first and second P-type semiconductor regions formed on the semiconductor layer.

12. A light reception device, comprising:

an on-chip lens;

a wiring layer; and

a semiconductor layer arranged between the on-chip lens and the wiring layer, wherein

the semiconductor layer includes:

a first tap having a first voltage application portion to which a first voltage is applied and a first charge detection portion arranged around the first voltage application portion; and

a second tap having a second voltage application portion to which a second voltage different from the first voltage is applied and a second charge detection portion arranged around the second voltage application portion,

wherein the on-chip lens is configured such that a position thereof differs depending upon an in-plane position of a pixel array section, so that an optical path length or a DC contrast of a chief ray from an object is uniform at in-plane pixels of the pixel array section;

a driving section configured to supply the first voltage or the second voltage to the first voltage application portion or the second voltage application portion; and

a voltage supply line configured to transmit the first voltage or the second voltage from the driving section to the first voltage application portion or the second voltage application portion, wherein

the voltage supply line has a line width that varies depending upon a distance from the driving section.

13. The light reception device according to claim 12 , wherein

the voltage supply line is formed such that the line width thereof increases as the distance from the driving section increases.

14. The light reception device according to claim 12 , wherein

the first and second voltage application portions are configured from first and second transfer transistors formed from the semiconductor layer, respectively.

15. The light reception device according to claim 12 , wherein

the wiring layer includes at least one layer that includes a reflection member, and

the reflection member is provided so as to overlap with the first charge detection portion or the second charge detection portion as viewed in plan.

16. The light reception device according to claim 12 , wherein

the wiring layer includes at least one layer that includes a shading member, and

the shading member is provided so as to overlap with the first charge detection portion or the second charge detection portion as viewed in plan.

17. The light reception device according to claim 12 , wherein

an inter-pixel shading film is also configured such that a position thereof differs depending upon in-plane positions of the pixel array section together with the on-chip lens.

18. The light reception device according to claim 12 , further comprising:

a pixel separation portion provided at a pixel boundary portion and configured to separate neighboring pixels at least partially in a depthwise direction of the semiconductor layer.

19. The light reception device according to claim 18 , wherein

the pixel separation portion includes a DTI that separates the neighboring pixels from a rear face side or a front face side to a predetermined depth of the semiconductor layer.

20. A distance measurement module, comprising:

a light reception device, including:

an on-chip lens;

a wiring layer; and

a semiconductor layer arranged between the on-chip lens and the wiring layer, wherein

the semiconductor layer includes:

a first tap having a first voltage application portion to which a first voltage is applied and a first charge detection portion arranged around the first voltage application portion; and

a second tap having a second voltage application portion to which a second voltage different from the first voltage is applied and a second charge detection portion arranged around the second voltage application portion,

wherein the first and second voltage application portions are configured from first and second transfer transistors formed from the semiconductor layer, respectively, and

wherein, in the light reception device, the on-chip lens is configured such that the position thereof differs depending upon an in-plane position of the pixel array section such that an optical path length or a DC contrast of a chief ray from an object is uniform at in-plane pixels of the pixel array section;

a light source configured to illuminate illumination light having a brightness that varies periodically; and

a light emission controlling section configured to control an illumination timing of the illumination light.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 22, 2020
From: ISOGAI, YUJI; IMOTO, TSUTOMU; MARUYAMA, TAKUYA; MURASE, TAKURO; WATANABE, RYOTA; WAKANO, TOSHIFUMI
To: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Reel/Frame 054188/0841 →
Priority Claims (1)
JP JP2018-135397 · Jul 18, 2018 · national
Continuity (1)
Related Publication 20210364604A1 · Nov 25, 2021
Cited By (1)
US 12,205,964