Semiconductor test apparatus, semiconductor device test method, and semiconductor device manufacturing method

1. A semiconductor test apparatus comprising:

a power supply;

a high-voltage wire connecting high-voltage terminals of a plurality of semiconductor devices which are objects to be tested to a high-voltage side of the power supply;

a low-voltage wire connecting low-voltage terminals of the semiconductor devices to a low-voltage side of the power supply;

first switches connected in series to the semiconductor devices respectively, each of the first switches having one end connected to the low-voltage side of the power supply via the low-voltage wire and another end connected to the low-voltage terminal;

second switches connected to the semiconductor devices respectively, each of the second switches having one end connected to the high-voltage terminal and another end connected to the low-voltage terminal; and

a control circuit controlling the first switches and the second switches.

2. The semiconductor test apparatus according to claim 1 , wherein the control circuit controls the first switches to on and controls the second switches to off at a time of a test start, and

after the test start, the control circuit determines the semiconductor device in which a leak current equal to or larger than a reference value is detected as a defective semiconductor device, controls the first switch connected to the defective semiconductor device to off and thereafter controls the second switch connected to the defective semiconductor device to on.

3. The semiconductor test apparatus according to claim 2 , further comprising a plurality of third switches connected to the low-voltage terminals of the semiconductor devices and electrically turning on or off between the low-voltage terminals.

4. The semiconductor test apparatus according to claim 3 , wherein the control circuit controls the third switches to on at the time of the test start, and

after the test start, the control circuit controls the third switch connected to the low-voltage terminal of the defective semiconductor device to off and thereafter controls the first switch connected to the defective semiconductor device to off.

5. The semiconductor test apparatus according to claim 3 , further comprising a third switch connection wire connecting the plurality of third switches to the low-voltage side of the power supply,

wherein one end of the third switches are independently connected to the low-voltage terminals of the semiconductor devices, and another ends of the third switches are connected to the third switch connection wire in common.

6. The semiconductor test apparatus according to claim 2 , further comprising a plurality of bidirectional diodes connected to the low-voltage terminals of the semiconductor devices and electrically turning on or off between the low-voltage terminals.

7. The semiconductor test apparatus according to claim 6 , further comprising a bidirectional diode connection wire connecting the plurality of bidirectional diodes to the low-voltage side of the power supply,

wherein one end of the bidirectional diodes are independently connected to the low-voltage terminals of the semiconductor devices, and another end of the bidirectional diodes are connected to the bidirectional diode connection wire in common.

8. The semiconductor test apparatus according to claim 2 , further comprising fourth switches,

wherein the semiconductor devices are MOSFETs having a gate electrode, a drain electrode that is the high-voltage terminal, and a source electrode that is the low-voltage terminal, one end of the fourth switches are connected to the gate electrodes of the semiconductor devices respectively, and another end of the fourth switches are connected to the source electrodes of the semiconductor devices respectively.

9. The semiconductor test apparatus according to claim 8 , wherein the control circuit controls the fourth switches to off at the time of the test start, and

after the test start, the control circuit controls the second switch connected to the defective semiconductor device and the fourth switch connected to the defective semiconductor device to on simultaneously.

10. The semiconductor test apparatus according to claim 1 , wherein the object to be tested is a semiconductor wafer including a plurality of MOSFETs,

each of the MOSFETs has a gate electrode, a drain electrode that is the high-voltage terminal, and a source electrode that is the low-voltage terminal,

the drain electrodes are formed on a rear surface side of the semiconductor wafer,

the source electrodes and the gate electrodes are formed on a front surface side of the semiconductor wafer,

the semiconductor test apparatus comprises a wafer stage, probes, a probe card, and a control unit,

the wafer stage is connected to the high-voltage wire,

when the semiconductor wafer is placed on the wafer stage such that a lower surface side of the semiconductor wafer comes into contact with the wafer stage, the wafer stage is electrically connected to the drain electrodes of the plurality of MOSFETs,

the probes are provided opposite to the wafer stage, brought into contact with an upper surface side of the semiconductor wafer and independently connected to the source electrodes of the plurality of MOSFETs,

the probe card is connected to the low-voltage wire and holds the probes, and

the control unit is connected to the high-voltage wire and the low-voltage wire and includes the first switches, the second switches and the control circuit inside.