IP Library › Granted Patent US 11,380,599
Granted Patent B2
US 11,380,599 · App. 16/799,679 · Granted Jul 5, 2022

Semiconductor module, vehicle, and method of manufacturing semiconductor module

Inventors: Kohei Yamauchi (Matsumoto, JP); Tatsuhiko Asai (Hino, JP)
Assignee: FUJI ELECTRIC CO., LTD.
H01L23/3142H01L21/56H01L23/5386H05K1/11
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,380,599
App. No.
16/799,679
Granted
Jul 5, 2022
Kind
B2
Abstract

There is provided a semiconductor module including: a base for semiconductor cooling; a stacked substrate provided above the base; a semiconductor chip provided above the stacked substrate; a coating layer provided on an upper surface of the semiconductor chip; and a sealing resin for sealing the semiconductor chip, in which the base is in contact with the sealing resin.

Claims (39)

1. A method of manufacturing a semiconductor module, the method comprising:

providing a base for semiconductor cooling;

providing a stacked substrate above the base;

providing a semiconductor chip above the stacked substrate;

providing a coating layer on an upper surface of the semiconductor chip; and

sealing the semiconductor chip with a sealing resin, wherein

the base is in contact with the sealing resin, and

wherein the coating layer is provided between the semiconductor chip and the sealing resin and is adapted to prevent the sealing resin from being peeled off from the semiconductor chip.

2. The method of manufacturing a semiconductor module according to claim 1 , wherein

the providing of the coating layer includes applying the coating layer by spray application.

3. The method of manufacturing a semiconductor module according to claim 1 , wherein the sealing resin is insulating.

4. A semiconductor module comprising:

a base for semiconductor cooling;

a stacked substrate provided above the base;

a semiconductor chip provided above the stacked substrate;

a coating layer provided on an upper surface of the semiconductor chip; and

a sealing resin sealing the semiconductor chip, wherein

the base is in contact with the sealing resin, and

wherein the coating layer is provided between the semiconductor chip and the sealing resin and is adapted to prevent the sealing resin from being peeled off from the semiconductor chip.

5. The semiconductor module according to claim 4 , wherein the stacked substrate comprises:

a first metal layer;

a second metal layer; and

an insulation plate interposed between the first metal layer and the second metal layer.

6. The semiconductor module according to claim 4 , wherein

the semiconductor chip has an upper main electrode of the semiconductor chip, and

the coating layer is provided in contact with an upper surface of the upper main electrode.

7. The semiconductor module according to claim 4 , wherein

the coating layer is provided on at least a part of an upper surface of the stacked substrate.

8. The semiconductor module according to claim 4 , wherein

the coating layer includes at least one of polyimide or polyamide.

9. The semiconductor module according to claim 4 , wherein the sealing resin is insulating.

10. A vehicle comprising the semiconductor module according to claim 4 .

11. The semiconductor module according to claim 4 , further comprising:

a metal wiring plate provided on the upper surface of the semiconductor chip, wherein

the coating layer is provided on the upper surface of the semiconductor chip, and at least one of an upper surface or a lower surface of the metal wiring plate.

12. The semiconductor module according to claim 11 , wherein

the coating layer is provided on the lower surface of the metal wiring plate rather than on the upper surface of the metal wiring plate.

13. The semiconductor module according to claim 11 , wherein

the coating layer is provided on the upper surface of the metal wiring plate rather than on the lower surface of the metal wiring plate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 24, 2020
From: YAMAUCHI, KOHEI; ASAI, TATSUHIKO
To: FUJI ELECTRIC CO., LTD.
Reel/Frame 051909/0277 →
Priority Claims (1)
JP JP2019-116218 · Jun 24, 2019 · national
Continuity (1)
Related Publication 20200402880A1 · Dec 24, 2020