Adjusting a throttling threshold in a processor
In an embodiment, a processor includes processing cores to execute instructions; and throttling logic. The throttling logic is to: determine an average capacitance score for execution events in a sliding window; perform frequency throttling when the average capacitance score exceeds a throttling threshold; determine a count of frequency throttling instances; and in response to a determination that the count of frequency throttling instances exceeds a maximum throttling value, increase the throttling threshold and concurrently reduce a baseline frequency. Other embodiments are described and claimed.
1. A processor comprising:
a plurality of processing engines to execute instructions; and
throttling logic to:
perform a plurality of throttling instances based on a capacitance score and a throttling threshold; and
adjust the throttling threshold based on a count of the plurality of throttling instances.
2. The processor of claim 1 , wherein the capacitance score is an average capacitance score for a plurality of execution events.
3. The processor of claim 2 , wherein the average capacitance score is associated with a sliding time window.
4. The processor of claim 2 , the throttling logic to, in each throttling instance of the plurality of throttling instances:
perform frequency throttling in response to a determination that the average capacitance score exceeds a throttling threshold.
5. The processor of claim 2 , the throttling logic to:
determine the average capacitance score based on a plurality of capacitance weights associated with the plurality of execution events.
6. The processor of claim 1 , the throttling logic to:
increase the throttling threshold in response to a determination that the count of frequency throttling instances exceeds a maximum throttling value.
7. The processor of claim 6 , the throttling logic to:
reduce a baseline frequency in response to the determination that the count of frequency throttling instances exceeds the maximum throttling value.
8. A method, comprising:
performing, in a processor, a plurality of throttling instances based on a capacitance score and a throttling threshold; and
adjusting, in the processor, the throttling threshold based on a count of the plurality of throttling instances.
9. The method of claim 8 , wherein the capacitance score is an average capacitance score for a plurality of execution events in the processor.
10. The method of claim 9 , wherein the average capacitance score is associated with a sliding time window.
11. The method of claim 9 , comprising, for each throttling instance of the plurality of throttling instances:
determining whether the average capacitance score exceeds a throttling threshold; and
performing frequency throttling in response to a determination that the average capacitance score exceeds the throttling threshold.
12. The method of claim 9 , comprising:
determining the average capacitance score based on a plurality of capacitance weights associated with the plurality of execution events.
13. The method of claim 8 , comprising:
determining whether the count of frequency throttling instances exceeds a maximum throttling value; and
increasing the throttling threshold in response to a determination that the count of frequency throttling instances exceeds the maximum throttling value.
14. The method of claim 13 , comprising:
reducing a baseline frequency in response to the determination that the count of frequency throttling instances exceeds the maximum throttling value.
15. A system comprising:
a processor comprising a plurality of processing engines to execute instructions, wherein a first processing engine comprises a throttling circuit to:
perform a plurality of throttling instances based on a capacitance score and a throttling threshold; and
adjust the throttling threshold based on a count of the plurality of throttling instances; and
a system memory coupled to the processor.
16. The system of claim 15 , wherein the capacitance score is an average capacitance score for a plurality of execution events.
17. The system of claim 16 , wherein the average capacitance score is associated with a sliding time window.
18. The system of claim 16 , the throttling circuit to, in each throttling instance of the plurality of throttling instances:
perform frequency throttling in response to a determination that the average capacitance score exceeds a throttling threshold.
19. The system of claim 15 , the throttling circuit to:
increase the throttling threshold in response to a determination that the count of frequency throttling instances exceeds a maximum throttling value.
20. The system of claim 19 , the throttling circuit to:
reduce a baseline frequency in response to the determination that the count of frequency throttling instances exceeds the maximum throttling value.