Method of making moisture barrier for bond pads and integrated circuit having the same
A semiconductor die includes a substrate layer, one or more metal layers disposed over the substrate layer, and a pair of polyimide layers disposed over the substrate so that they define an interface therebetween. One or both of the pair of polyimide layers have a trench that separates the interface from the one or more metal layers. The trench can be formed by etching the polyimide layer(s). A topcoat insulation layer is disposed over the one or more metal layers and polyimide layers. The topcoat insulation layer is impervious to moisture and the trench inhibits migration of moisture along the interface to the one or more metal layers, thereby preventing metal migration from the one or more metal layers along the interface.
1. A method of making a semiconductor die, the method comprising:
forming or providing a substrate layer;
forming or applying one or more metal layers over the substrate layer;
forming or applying a first polymer interlevel dielectric layer over the substrate layer and forming or applying a second polymer interlevel dielectric layer over the first polymer interlevel dielectric layer to define an interface therebetween, at least a portion of the first and second polymer interlevel dielectric layers being adjacent at least one of the one or more metal layers;
forming a trench in the one or both of the first and second polymer interlevel dielectric layers and filling the trench such that the interface between the first and second polymer interlevel dielectric layers is separated from the one or more metal layers; and
forming or applying a topcoat insulation layer over the one or more metal layers and first and second polymer interlevel dielectric layers, the topcoat insulation layer being impervious to moisture, the trench inhibiting migration of moisture along the interface to the one or more metal layers, thereby preventing metal migration from the one or more metal layers along the interface.
2. The method of claim 1 wherein filling the trench includes filling the trench with one of: at least a portion of the topcoat insulation layer, at least a portion of one or more metal layers, and at least a portion of another of the first and second polymer interlevel dielectric layers.
3. The method of claim 1 wherein the first and second polymer interlevel dielectric layers are a first and second polyimide layers.
4. The method of claim 1 wherein the trench is formed in each of the two polymer interlevel dielectric layers in a stepped manner relative to each other.
5. The method of claim 1 wherein forming the trench includes etching one or both of the first and second polymer interlevel dielectric layers to form the trench.
6. The method of claim 1 wherein the one or more metal layers are one or more electrodes of a bond pad.
7. The method of claim 1 further comprising forming or applying one or more insulation layers at least partially over the substrate layer.
8. The method of claim 1 wherein forming the trench includes tapering the trench toward the substrate layer.
9. The method of claim 1 wherein the trench circumscribes a bond pad of the semiconductor die defined at least in part by the one or more metal layers.
10. A method of making a radiofrequency module, the method comprising:
forming or providing a printed circuit board that includes a substrate layer;
forming or providing a semiconductor die comprising (a) forming or providing a substrate layer, (b) forming or applying one or more metal layers over the substrate layer, (c) forming or applying a first polymer interlevel dielectric layer over the substrate layer and forming or applying a second polymer interlevel dielectric layer over the first polymer interlevel dielectric layer to define an interface therebetween, at least a portion of the first and second polymer interlevel dielectric layers being adjacent at least one of the one or more metal layers, (d) forming a trench in the one or both of the first and second polymer interlevel dielectric layers and filling the trench such that the interface between the first and second polymer interlevel dielectric layers is separated from the one or more metal layers, and (e) forming or applying a topcoat insulation layer over the one or more metal layers and first and second polymer interlevel dielectric layers, the topcoat insulation layer being impervious to moisture, the trench inhibiting migration of moisture along the interface to the one or more metal layers, thereby preventing metal migration from the one or more metal layers along the interface; and
mounting the semiconductor die on the printed circuit board.
11. The method of claim 10 wherein filling the trench includes filling the trench with at least a portion of the topcoat insulation layer.
12. The method of claim 10 wherein filling the trench includes filling the trench with at least a portion of one or more metal layers.
13. The method of claim 10 wherein filling the trench includes filling the trench with at least a portion of another of the first and second polymer interlevel dielectric layers.
14. The method of claim 10 wherein the first and second polymer interlevel dielectric layers are a first and second polyimide layers.
15. The method of claim 10 wherein the trench is formed in each of the two polymer interlevel dielectric layers in a stepped manner relative to each other.
16. The method of claim 10 wherein forming the trench includes etching one or both of the first and second polymer interlevel dielectric layers to form the trench.
17. The method of claim 10 wherein the one or more metal layers are one or more electrodes of a bond pad.
18. The method of claim 10 further comprising forming or applying one or more insulation layers at least partially over the substrate layer.
19. The method of claim 10 wherein forming the trench includes tapering the trench toward the substrate layer.
20. The method of claim 10 wherein the trench circumscribes a bond pad of the semiconductor die defined at least in part by the one or more metal layers.