IP Library › Granted Patent US 11,398,418
Granted Patent B2
US 11,398,418 · App. 16/683,330 · Granted Jul 26, 2022

Semiconductor module

Inventor: Hidekazu Sugiura (Seto, JP)
Assignee: DENSO CORPORATION
H01L23/49575H01L23/49562H01L29/1608H01L29/7395H01L29/78H01L29/861
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Quick Facts
Patent No.
US 11,398,418
App. No.
16/683,330
Granted
Jul 26, 2022
Kind
B2
Abstract

A semiconductor module may include: a first semiconductor chip including a first semiconductor substrate including a field effect transistor and constituted of SiC, a drain electrode and a source electrode provided on the first semiconductor substrate; a second semiconductor chip including a second semiconductor substrate including a diode, a cathode electrode and an anode electrode provided on the second semiconductor substrate; a first lead frame including a first main terminal and connected to the drain electrode and the cathode electrode; and a second lead frame including a second main terminal and connected to the source electrode and the anode electrode. A first current path extending from the second to first main terminal via the first semiconductor chip may be longer than a second current path extending from the second to first main terminal via the second semiconductor chip.

Claims (26)

1. A semiconductor module, comprising:

a first semiconductor chip comprising:

a first semiconductor substrate comprising a field effect transistor and constituted of SiC (silicon carbide);

a drain electrode provided on one surface of the first semiconductor substrate; and

a source electrode provided on a surface of the first semiconductor substrate other than the one surface of the first semiconductor substrate;

a second semiconductor chip comprising:

a second semiconductor substrate comprising a diode;

a cathode electrode provided on one surface of the second semiconductor substrate; and

an anode electrode provided on a surface of the second semiconductor substrate other than the one surface of the second semiconductor substrate;

a first lead frame comprising a first main terminal and connected to the drain electrode and the cathode electrode; and

a second lead frame comprising a second main terminal and connected to the source electrode and the anode electrode,

wherein

a first current path extending from the second main terminal to the first main terminal through the first semiconductor chip is longer than a second current path extending from the second main terminal to the first main terminal through the second semiconductor chip.

2. The semiconductor module of claim 1 , wherein

the second semiconductor substrate further comprises an insulated gate bipolar transistor,

a collector of the insulated gate bipolar transistor is connected to the cathode electrode, and

an emitter of the insulated gate bipolar transistor is connected to the anode electrode.

3. The semiconductor module of claim 1 , further comprising:

a third semiconductor chip comprising:

a third semiconductor substrate comprising an insulated gate bipolar transistor;

a collector electrode provided on one surface of the third semiconductor substrate; and

an emitter electrode provided on a surface of the third semiconductor substrate other than the one surface of the third semiconductor substrate,

wherein

the first lead frame is connected to the collector electrode,

the second lead frame is connected to the emitter electrode, and

the third semiconductor chip is located between the first semiconductor chip and the second semiconductor chip.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2020
From: TOYOTA JIDOSHA KABUSHIKI KAISHA
To: DENSO CORPORATION
Reel/Frame 052279/0846 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 14, 2019
From: SUGIURA, HIDEKAZU
To: TOYOTA JIDOSHA KABUSHIKI KAISHA
Reel/Frame 051004/0649 →
Priority Claims (1)
JP JP2018-235362 · Dec 17, 2018 · national
Continuity (1)
Related Publication 20200194358A1 · Jun 18, 2020