Display device and electronic device having neural network for calculating set values of luminance and color tone

1. A display system comprising:

a host device;

a display portion; and

an image processing portion comprising a processing circuit,

wherein the host device is configured to perform a supervised learning based on learning data and teacher data by using a neural network on software,

wherein the host device is configured to generate a plurality of weight coefficients based on the supervised learning and to input the plurality of the weight coefficients to the processing circuit,

wherein the processing circuit is configured to perform an arithmetic operation using a neural network on hardware and to generate output data based on input data and the plurality of the weight coefficients,

wherein the number of layers of the neural network of the processing circuit is equivalent to the number of layers of the neural network of the software,

wherein each of the learning data and the input data comprises data of an illuminance of external light,

wherein the teacher data comprises a first set value corresponding to a first luminance and a first color tone,

wherein the output data comprises a second set value corresponding to a second luminance and a second color tone,

wherein the processing circuit comprises a first memory cell, a second memory cell, and an offset circuit,

wherein the first memory cell is configured to output a first current corresponding to a first analog data stored in the first memory cell,

wherein the second memory cell is configured to output a second current corresponding to a reference analog data stored in the second memory cell,

wherein the offset circuit is configured to output a third current corresponding to a differential current between the first current and the second current,

wherein the first memory cell is configured to output a fourth current corresponding to the first analog data stored in the first memory cell when a second analog data is supplied as a selection signal,

wherein the second memory cell is configured to output a fifth current corresponding to the reference analog data stored in the second memory cell when the second analog data is supplied as the selection signal,

wherein the processing circuit is configured to obtain a sixth current corresponding to a differential current between the fourth current and the fifth current and to output a seventh current depending on a sum of products of the first analog data and the second analog data, and

wherein the first analog data is a data corresponding to a first weight coefficient of the plurality of the weight coefficients.

2. The display system according to claim 1 , further comprising a source driver circuit,

wherein the image processing portion is configured to supply image data to the source driver circuit.

3. The display system according to claim 1 ,

wherein the processing circuit is configured to output the seventh current by subtracting the third current from the sixth current.

4. The display system according to claim 1 , further comprising a sensor,

wherein the display portion comprises a display element,

wherein the sensor is configured to obtain the illuminance of external light, and

wherein the display element is configured to display an image corresponding to the output data.

5. The display system according to claim 1 , further comprising a sensor,

wherein the display portion comprises a first display element and a second display element,

wherein the sensor is configured to obtain the illuminance of external light,

wherein the output data further comprises a third set value corresponding to a third luminance and a third color tone,

wherein the first display element is configured to display an image corresponding to the second luminance and the second color tone by reflection of external light, and

wherein the second display element is configured to display an image corresponding to the third luminance and the third color tone by self emission.

6. The display system according to claim 1 ,

wherein the first memory cell, the second memory cell, and the offset circuit comprises a first transistor, and

wherein the first transistor comprises a metal oxide in a channel formation region.

7. The display system according to claim 1 ,

wherein the offset circuit comprises a first current generation circuit, and a second current generation circuit,

wherein the first current generation circuit is configured to generate the third current when an amount of the first current is smaller than an amount of the second current, and to retain a potential corresponding to the third current,

wherein the second current generation circuit is configured to generate an eighth current corresponding to a difference between the first current and the second current when the amount of the first current is larger than the amount of the second current, and to retain a potential corresponding to the eighth current, and

wherein the processing circuit is configured to output the seventh current by subtracting the third current or the eighth current from the sixth current.

8. The display system according to claim 1 , further comprising:

a base; and

an integrated circuit,

wherein the display portion is formed over the base,

wherein the integrated circuit is mounted over the base,

wherein the processing circuit is formed over the base,

wherein the integrated circuit comprises the image processing portion, and

wherein the image processing portion is configured to process image data based on the output data.

9. The display system according to claim 8 ,

wherein the integrated circuit comprises a second transistor, and

wherein the second transistor comprises silicon in a channel formation region.

10. The display system according to claim 8 ,

wherein the integrated circuit comprises a third transistor, and

wherein the third transistor comprises a metal oxide in a channel formation region.