IP Library › Granted Patent US 11,404,461
Granted Patent B2
US 11,404,461 · App. 16/451,642 · Granted Aug 2, 2022

Anti-reflective layers in semiconductor devices

Inventor: Daniel Gäbler (Apolda, DE)
Assignee: X-FAB SEMICONDUCTOR FOUNDRIES GMBH
H01L27/1462G02B1/11H01L27/14643H01L27/14685H01L27/14689
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Quick Facts
Patent No.
US 11,404,461
App. No.
16/451,642
Granted
Aug 2, 2022
Kind
B2
Abstract

A Complementary Metal Oxide Semiconductor, CMOS, device for radiation detection. The CMOS device includes a semiconductor diffusion layer having a photodetector region for receiving incident light, and a polysilicon layer having a patterned structure in a region at least partially overlapping the photodetector region. The structure includes a plurality of features being perforations extending through the polysilicon layer or columns of polysilicon, wherein the perforations are filled with, or the columns are surrounded by, a dielectric material.

Claims (19)

1. A Complementary Metal Oxide Semiconductor, CMOS, device for radiation detection, said CMOS device comprising:

a semiconductor diffusion layer having a photodetector region for receiving incident light; and

a polysilicon layer having a patterned structure in a region at least partially overlapping said photodetector region, said structure comprising a plurality of features being perforations extending through said polysilicon layer or columns of polysilicon, wherein said perforations are filled with, or said columns are surrounded by, a dielectric material, wherein said polysilicon layer has a thickness in the range of 150 nm to 250 nm.

2. The CMOS device according to claim 1 , wherein each feature has a width in the range of 220 nm to 350 nm and a spacing from an adjacent feature in the range of 150 nm to 210 nm.

3. The CMOS device according to claim 1 , wherein said patterned structure forms a layer which is an effective medium having a refractive index in the range of 2.3 to 3.0 for light having a wavelength between 200 nm and 1100 nm.

4. The CMOS device according to claim 1 , wherein said semiconductor diffusion layer comprises silicon and said dielectric material is one of silicon oxide, SiO 2 , silicon nitride, Si 3 N 4 , and silicon oxynitride, SION.

5. The CMOS device according to claim 1 , wherein each of said features has a same shape, and wherein said shape is one of circular, hexagonal and square.

6. The CMOS device according to claim 1 , further comprising a contact stop layer, CSL.

7. The CMOS device according to claim 6 , wherein said CSL comprises silicon nitride, Si 3 N 4 , or silicon oxynitride, SION.

8. The CMOS device according to claim 1 , further comprising:

a second patterned structure providing an effective medium formed in said semiconductor diffusion layer in said photodetector region so that light entering the photodetector region passes through the effective medium when in use, said second patterned structure comprising features being trenches or raised portions, wherein said trenches are filled with, or said raised portions are surrounded by, a dielectric material, wherein said trenches have an opening, a bottom with a substantially flat bottom portion, and sides between said opening and said bottom, and wherein said raised portions have a foot, atop with a substantially flat top portion, and sides between said foot and said top.

9. The CMOS device according to claim 8 , wherein each of said features in the diffusion layer has a width in the range of 250 nm to 310 nm and a spacing from an adjacent feature in the range of 190 nm to 250 nm.

10. The CMOS device according to claim 8 , wherein said second patterned structure in said diffusion layer forms a layer which is an effective medium having a refractive index in the range of 2.8 to 3.5 for light having a wavelength between 200 nm and 1100 nm.

11. The CMOS device according to claim 10 , wherein said sides are tapered such that said refractive index increases continuously with depth through said effective medium.

12. The CMOS device according to claim 8 , wherein said semiconductor diffusion layer comprises silicon and said dielectric material is one of silicon oxide, SiO 2 , silicon nitride, Si 3 N 4 , and silicon oxynitride, SION.

13. The CMOS device according to claim 8 , wherein each of said features in said diffusion layer has a shape which is the same as each of the other of said features, and wherein said shape is one of circular, hexagonal and square.

14. The CMOS device according to claim 8 , wherein said plurality of features forms a pattern in said semiconductor diffusion layer and said pattern is one of quadratic and hexagonal.

15. The CMOS device according to claim 8 , wherein each of said features of said polysilicon layer at least partially overlaps a feature in said semiconductor diffusion layer.

16. A CMOS device according to claim 6 , wherein said patterned structure of said polysilicon layer forms a layer which is an effective medium having a first refractive index, and wherein said CSL has a second refractive index which is lower than said first refractive index.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 3, 2019
From: GÄBLER, DANIEL
To: X-FAB SEMICONDUCTOR FOUNDRIES GMBH
Reel/Frame 049663/0040 →
Priority Claims (1)
GB 1810383 · Jun 25, 2018 · national
Continuity (1)
Related Publication 20190393251A1 · Dec 26, 2019