Bipolar junction transistor, and a method of forming a collector for a bipolar junction transistor
A bipolar junction transistor is provided with a multilayer collector structure. The layers of the collector are individually grown in separate epitaxial growth stages. For a PNP transistor, each layer, after it is grown, is doped with a p-type dopant in a dedicated implant stage. By providing separate epitaxial growth stages and separate dopant implant stages for each layer of the collector, the dopant concentration profile in the collector region can be better controlled to optimize the speed and breakdown voltage of a bipolar junction transistor.
1. A bipolar junction transistor, comprising:
an emitter;
a base; and
a collector,
wherein the collector comprises a plurality of individually grown epitaxial layers, wherein the epitaxial layers have received respective dopant implants of a same dopant type such that the epitaxial layers have respective dopant profiles.
2. The bipolar junction transistor according to claim 1 , wherein the respective dopant profiles are at least partially determined by thicknesses of the epitaxial layers.
3. The bipolar junction transistor according to claim 1 , wherein the respective dopant profiles are respective dopant concentration profiles.
4. The bipolar junction transistor according to claim 3 , wherein different ones of the epitaxial layers have respective dopant concentration profiles that are different from each other.
5. The bipolar junction transistor according to claim 1 , wherein different ones of the epitaxial layers have thicknesses that are different from each other.
6. The bipolar junction transistor according to claim 1 , wherein the collector has three individually grown epitaxial layers, including a buried layer, an intermediate layer and a top layer.
7. The bipolar junction transistor according to claim 6 , wherein the intermediate layer is thicker than the top layer.
8. The bipolar junction transistor according to claim 1 , wherein one of the epitaxial layers is a buried layer, wherein each of the epitaxial layers has a maximum dopant concentration, and wherein the maximum dopant concentration of the buried layer is higher than the maximum dopant concentrations of the other ones of the epitaxial layers.
9. The bipolar junction transistor according to claim 1 , wherein the bipolar junction transistor is a PNP transistor and the respective dopant implants are P-type dopant implants.
10. The bipolar junction transistor according to claim 1 , wherein the plurality of epitaxial layers are silicon layers, and the respective dopant implants are boron implants.
11. The bipolar junction transistor according to claim 1 , wherein one of the epitaxial layers is a buried layer, wherein the collector has an overall dopant concentration profile having an overall maximum dopant concentration, and wherein the thickness of the buried layer is configured to limit the overall maximum dopant concentration.
12. The bipolar junction transistor according to claim 1 , wherein the collector is formed of silicon, wherein the respective dopant implants are boron implants, and wherein the overall maximum dopant concentration is less than or equal to 1×10 18 cm −3 .
13. The bipolar junction transistor according to claim 6 , wherein the buried layer is a p-type layer, the intermediate layer as grown is an n-type layer overlying the p-type buried layer, and the top layer as grown is an n-type layer overlying the intermediate layer, and wherein each of the buried layer, the intermediate layer and the top layer is implanted with a p-type dopant after being grown.
14. The bipolar junction transistor according to claim 6 , wherein a ratio of a thickness of the intermediate layer to a thickness of the top layer is configured to optimize dopant diffusivity rates to create a desired dopant profile across the epitaxial layers for a given thermal budget.
15. The bipolar junction transistor according to claim 14 , wherein the ratio of the thickness of the intermediate layer to the thickness of the top layer is 4.5:3.3.
16. A method of manufacturing the bipolar junction transistor of claim 1 , the method comprising:
forming the collector, wherein the epitaxial layers having received the respective dopant implants are formed by:
providing a first silicon layer;
implanting the first silicon layer with a first concentration of dopant;
forming a second silicon layer over the first silicon layer;
implanting the second silicon layer with a second concentration of dopant; and
exposing the collector to a specified thermal budget such that each of the first silicon layer and the second silicon layer has a respective dopant profile.
17. The method of claim 16 , further comprising, before exposing the collector to a specified thermal budget, providing a third silicon layer over the second silicon layer and implanting the third silicon layer with a third concentration of dopant.
18. The method of claim 17 , wherein the second silicon layer is epitaxially grown over the first silicon layer and the third silicon layer is epitaxially grown over the second silicon layer.
19. The method of claim 16 , wherein the first silicon layer is provided as part of a silicon on oxide wafer, and wherein the first silicon layer has a starting thickness of at least 2.2 μm.
20. A PNP bipolar junction transistor, comprising:
a collector comprising:
a buried layer, an intermediate layer and a top layer, at least the intermediate and top layers being individually grown epitaxial layers, wherein each of the buried, intermediate and top layers having a respective dopant implant profile,
wherein the intermediate layer is thicker than the top layer, and
the respective dopant implant profile is a boron profile;
a base positioned over a portion of the collector; and
an emitter positioned over the base.