IP Library › Granted Patent US 11,409,680
Granted Patent B2
US 11,409,680 · App. 17/038,297 · Granted Aug 9, 2022

Method of operating audio subsystem for USB module, system-on-chip performing the same and method of operating system-on-chip using the same

Inventors: Younghyeok Kim (Seoul, KR); Hana Yang (Gunpo-si, KR)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
G06F13/385G06F1/10G06F3/16
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Quick Facts
Patent No.
US 11,409,680
App. No.
17/038,297
Granted
Aug 9, 2022
Kind
B2
Abstract

In a method of operating an audio subsystem and a universal serial bus (USB) module, the audio subsystem receives a reference clock signal from the USB module. A USB direct memory access (UDMA) block included in the audio subsystem performs an automatic restart every predetermined period in synchronization with the reference clock signal. The UDMA block transmits data having a predetermined size to the USB module by performing a direct memory access (DMA) operation whenever the automatic restart is performed.

Claims (22)

1. A system-on-chip (SOC) comprising an audio subsystem and a universal serial bus (USB) module,

wherein the audio subsystem comprises:

a first memory configured to store audio data; and

a USB direct memory access (UDMA) block configured to control a direct memory access (DMA) operation in which the audio data is transmitted to the USB module; and

wherein the USB module comprises:

a USB controller configured to provide a reference clock signal to the audio subsystem; and

a second memory configured to store the audio data received from the audio subsystem,

wherein the UDMA block is configured to perform an automatic restart every predetermined period in synchronization with the reference clock signal received from the USB controller, and to transmit data having a predetermined size to the USB module by performing the DMA operation whenever the automatic restart is performed, and

wherein the data having the predetermined size is a portion of the audio data.

2. The SOC of claim 1 , wherein the UDMA block comprises:

a USB clock counter configured to count a number of times of activations of the reference clock signal, and to generate an automatic restart signal triggering the automatic restart based on a result of the counting; and

a USB synchronization DMA unit configured to perform the automatic restart based on the automatic restart signal, and to transmit the data having the predetermined size to the USB module.

3. The SOC of claim 2 , wherein the USB clock counter is configured to activate the automatic restart signal based on determining that the number of times of the activations of the reference clock signal reaches a reference number.

4. The SOC of claim 2 , wherein the UDMA block further comprises:

a USB register configured to temporarily store the data having the predetermined size.

5. The SOC of claim 1 , wherein the data having the predetermined size is directly transmitted from the first memory to the second memory by the UDMA block.

6. The SOC of claim 1 , wherein the audio data is provided from an external memory disposed outside the SOC, and is stored into the first memory in response to a request for a play or replay of the audio data.

7. The SOC of claim 1 , wherein the USB module is configured to output the data having the predetermined size to an external USB device disposed outside the SOC after the data having the predetermined size is accumulated in the second memory by two or more.

8. The SOC of claim 1 , wherein the USB module is configured to output the data having the predetermined size to an external USB device disposed outside the SOC after the data having the predetermined size is accumulated in the second memory by one or more.

9. The SOC of claim 1 , wherein the USB module further comprises:

a USB interface configured to output the data having the predetermined size to an external USB device disposed outside the SOC based on the reference clock signal.

10. The SOC of claim 1 , wherein the UDMA block is configured to operate based on a clock signal different from the reference clock signal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 30, 2020
From: KIM, YOUNGHYEOK; YANG, HANA
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 053933/0848 →
Priority Claims (1)
KR 10-2020-0038065 · Mar 30, 2020 · national
Continuity (1)
Related Publication 20210303497A1 · Sep 30, 2021