Semiconductor device and method of manufacturing the same
A semiconductor device and a method of manufacturing the same, the device including a plurality of lower electrodes on a semiconductor substrate; a support pattern connecting the lower electrodes at sides of the lower electrodes; and a dielectric layer covering the lower electrodes and the support pattern, wherein each of the plurality of lower electrodes includes a pillar portion extending in a vertical direction perpendicular to a top surface of the semiconductor substrate; and a protrusion protruding from a sidewall of the pillar portion so as to be in contact with the support pattern, the pillar portion includes a conductive material, the protrusion includes a same conductive material as the pillar portion and is further doped with impurities.
1. A semiconductor device, comprising:
lower electrodes on a semiconductor substrate;
a support pattern connecting the lower electrodes at sides of the lower electrodes; and
a dielectric layer covering the lower electrodes and the support pattern,
wherein:
each of the lower electrodes includes:
a pillar portion extending in a vertical direction perpendicular to a top surface of the semiconductor substrate; and
a protrusion protruding from a sidewall of the pillar portion so as to be in contact with the support pattern,
the pillar portion includes a conductive material, and
the protrusion includes a same conductive material as the pillar portion and is further doped with impurities.
2. The semiconductor device as claimed in claim 1 , wherein:
the conductive material includes a nitride of titanium (Ti) or tantalum (Ta), and
the impurities include carbon (C).
3. The semiconductor device as claimed in claim 1 , wherein a height of the protrusion in the vertical direction is substantially equal to a height of the support pattern in the vertical direction, as measured at an interface between the protrusion and the support pattern.
4. The semiconductor device as claimed in claim 1 , wherein the protrusion has a tapered shape such that a height of the protrusion in the vertical direction becomes smaller from the sidewall of the pillar portion to the support pattern.
5. The semiconductor device as claimed in claim 1 , wherein the protrusion has a concentration gradient of the impurities such that a concentration of impurities at an interface between the protrusion and the support pattern is greatest and becomes smaller in a direction toward the pillar portion.
6. The semiconductor device as claimed in claim 1 , wherein a content of the impurities in the protrusion ranges from 3 at % to 50 at %.
7. The semiconductor device as claimed in claim 1 , wherein the conductive material of the pillar portion is doped with the impurities.
8. The semiconductor device as claimed in claim 1 , wherein the dielectric layer is in contact with a remaining portion of a surface of the pillar portion that is not covered by the support pattern.
9. The semiconductor device as claimed in claim 1 , wherein a distance between adjacent ones of the lower electrodes ranges from 1 nm to 10 nm.
10. The semiconductor device as claimed in claim 1 , wherein the support pattern has a thickness of 0.3 Å to 50 Å.
11. The semiconductor device as claimed in claim 1 , wherein:
the pillar portion of each of the lower electrodes has a hollow cup shape, and
the dielectric layer is in contact with an inner sidewall of the pillar portion.