Impedance correcting method and apparatus, and impedance-corrected signal line for optical transceiver

1. An impedance correcting method comprising:

receiving, via a receiver electrically connected to a processor and a memory, an impedance according to an error of a resin applying process of a signal line for an optical transceiver;

acquiring, via the processor and the memory, a correction parameter for generating a correction impedance based on the impedance according to the error; and

determining, via the processor, the correction impedance for correcting the impedance according to the error based on the correction parameter,

wherein the determining, via the processor, of the correction impedance includes determining the correction impedance based on a start point of the error, a peak point of the error, an impedance value corresponding to the start point, and a target impedance value of the signal line.

2. The impedance correcting method of claim 1 , wherein the acquiring, via the processor and the memory, of the correction parameter comprises:

acquiring a start point of the error based on the impedance according to the error;

acquiring a peak point of the error based on the impedance according to the error; and

acquiring an impedance value corresponding to the start point based on the impedance according to the error.

3. The impedance correcting method of claim 1 , wherein the determining, via the processor, of the correction impedance based on the start point of the error, the peak point of the error, the impedance value corresponding to the start point, and the target impedance value of the signal line comprises:

determining the correction impedance such that the impedance linearly decreases from the start point.

4. The impedance correcting method of claim 3 , wherein the determining, via the processor, of the correction impedance such that the impedance linearly decreases from the start point comprises:

determining a peak value of the correction impedance based on a difference between the target impedance value and the impedance value corresponding to the start point.

5. The impedance correcting method of claim 3 , wherein the determining, via the processor, of the correction impedance such that the impedance linearly decreases from the start point comprises:

determining the correction impedance to have the target impedance value at the peak point.

6. The impedance correcting method of claim 3 , wherein the determining, via the processor, of the correction impedance such that the impedance linearly decreases from the start point comprises:

determining the correction impedance to have an impedance value greater than the target impedance value at the peak point.

7. The impedance correcting method of claim 1 , wherein the determining, via the processor, of the correction impedance based on the start point of the error, the peak point of the error, the impedance value corresponding to the start point, and the target impedance value of the signal line comprises:

determining the correction impedance to have a first impedance value from the start point to the peak point, linearly decrease from the peak point, and reach the target impedance value.

8. The impedance correcting method of claim 1 , wherein the determining, via the processor, of the correction impedance based on the start point of the error of the resin applying process, the peak point of the error of the resin applying process, the impedance value corresponding to the start point, and the target impedance value of the signal line comprises:

determining the correction impedance to have a first impedance value from the start point to the peak point and have a second impedance value by a predetermined length from the peak point.

9. An impedance correcting apparatus comprising:

a receiver, electrically connected to a memory, where the receiver is configured to receive an impedance corresponding to an error of a resin applying process of a signal line for an optical transceiver; and

a processor, electrically connected to the memory and the receiver, where the processor is configured to acquire a correction parameter for generating a correction impedance based on the impedance according to the error and determine the correction impedance for correcting the impedance according to the error based on the correction parameter,

wherein the processor is configured to determine the correction impedance based on a start point of the error, a peak point of the error, an impedance value corresponding to the start point, and a target impedance value of the signal line.

10. The impedance correcting apparatus of claim 9 , wherein the processor is configured to:

acquire a start point of the error based on the impedance according to the error;

acquire a peak point of the error based on the impedance according to the error; and

acquire an impedance value corresponding to the start point based on the impedance according to the error.

11. The impedance correcting apparatus of claim 9 , wherein the processor is configured to determine the correction impedance such that the impedance linearly decreases from the start point.

12. The impedance correcting apparatus of claim 11 , wherein the processor is configured to determine a peak value of the correction impedance based on a difference between the target impedance value and the impedance value corresponding to the start point.

13. The impedance correcting apparatus of claim 11 , wherein the processor is configured to determine the correction impedance to have the target impedance value at the peak point.

14. The impedance correcting apparatus of claim 11 , wherein the processor is configured to determine the correction impedance to have an impedance value greater than the target impedance value at the peak point.

15. The impedance correcting apparatus of claim 9 , wherein the processor is configured to determine the correction impedance to have a first impedance value from the start point to the peak point, linearly decrease from the peak point, and reach the target impedance value.

16. The impedance correcting apparatus of claim 9 , wherein the processor is configured to determine the correction impedance to have a first impedance value from the start point to the peak point and have a second impedance value by a predetermined length from the peak point.

17. The impedance correcting apparatus of claim 16 , wherein the second impedance value is determined based on the first impedance value.