IP Library Granted Patent US 11,416,639
Granted Patent B2
US 11,416,639 · App. 16/914,535 · Granted Aug 16, 2022

PQA unlock

Inventors: Oren Tanami (Ra'anana, IL); Ziv Hershman (Givat Shmuel, IL)
Assignee: NUVOTON TECHNOLOGY CORPORATION
G06F21/72H04L9/0825H04L9/0877H04L2209/12
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Quick Facts
Patent No.
US 11,416,639
App. No.
16/914,535
Granted
Aug 16, 2022
Kind
B2
Abstract

In one embodiment, a secure chip apparatus, includes a memory to store an encrypted value E and a one-way function output-value H, which is an output value of a one-way function computed with a nonce N as input, an interface to transfer data with an external device, and chip security circuitry to lock a portion of the chip apparatus from use, receive an unlock request from an unlocking hardware security module (HSM) via the interface, provide the encrypted value E to the HSM responsively to the unlock request, receive a value N′ from the HSM, the value N′ being a decrypted value of the encrypted value E, compute a one-way function output-value H′ responsively to the value N′, compare the value H′ to the value H, and unlock the portion of the chip apparatus for use responsively to a match between the value H′ and the value H.

Claims (89)

1. A secure integrated circuit (IC) chip apparatus, comprising:

a memory configured to store an encrypted value E of a nonce N and a one-way function output-value H, which is an output value of a one-way function computed with the nonce N as input;

an interface configured to transfer data with an external device; and

chip security circuitry configured to:

lock a portion of the IC chip apparatus from use;

receive an unlock request from an unlocking hardware security module (HSM) via the interface;

provide the encrypted value E to the HSM via the interface responsively to the unlock request;

receive a value N′ from the HSM, the value N′ being a decrypted value of the encrypted value E;

compute a one-way function output-value H′ responsively to the value N′;

compare the one-way function output-value H′ to the one-way function output-value H; and

unlock the portion of the IC chip apparatus for use responsively to a match between the value H′ and the value H.

2. The apparatus according to claim 1 , further comprising a random number generator to generate the nonce N, the chip security circuitry being configured to: provide the nonce N to a security-setup HSM; receive the encrypted value E and the one-way function output-value H from the security-setup HSM; and delete the nonce N.

3. The apparatus according to claim 1 , further comprising a random number generator to generate the nonce N, the chip security circuitry being configured to: compute the one-way function output-value H responsively to the nonce N; provide the nonce N to a security-setup HSM; receive the encrypted value E from the security-setup HSM; and delete the nonce N.

4. The apparatus according to claim 1 , further comprising a random number generator to generate the nonce N, the chip security circuitry being configured to: encrypt the nonce N yielding the encrypted value E; compute the one-way function output-value H responsively to the nonce N; and delete the nonce N.

5. The apparatus according to claim 1 , wherein the chip security circuitry is configured to receive the encrypted value E and the one-way function output-value H from a security-setup HSM.

6. The apparatus according to claim 1 , wherein the portion of the IC chip apparatus comprises a debug interface.

7. A secure integrated circuit (IC) chip method, comprising:

performing a chip-security setup process, comprising:

storing an encrypted value E of a nonce N and a one-way function output-value H, which is an output value of a one-way function computed with the nonce N as input, in a memory of an IC chip apparatus; and

locking a portion of the IC chip apparatus from use; and

performing an unlock process by the IC chip apparatus, comprising:

receiving an unlock request from an unlocking hardware security module (HSM) via an interface;

providing the encrypted value E to the HSM via the interface responsively to the unlock request;

receiving a value N′ from the HSM, the value N′ being a decrypted value of the encrypted value E;

computing a one-way function output-value H′ responsively to the value N′;

comparing the one-way function output-value H′ to the one-way function output-value H; and

unlocking the portion of the IC chip apparatus for use responsively to a match between the value H′ and the value H.

8. The method according to claim 7 , wherein the chip-security setup process further comprises the IC chip apparatus:

randomly generating the nonce N;

providing the nonce N to a security-setup HSM;

receiving the encrypted value E and the one-way function output-value H from the security-setup HSM; and

deleting the nonce N.

9. The method according to claim 7 , wherein the chip-security setup process further comprises the IC chip apparatus:

randomly generating the nonce N;

computing the one-way function output-value H responsively to the nonce N;

providing the nonce N to a security-setup HSM;

receiving the encrypted value E from the security-setup HSM; and

deleting the nonce N.

10. The method according to claim 7 , wherein the chip-security setup process further comprises the IC chip apparatus:

randomly generating the nonce N;

encrypting the nonce N yielding the encrypted value E;

computing the one-way function output-value H responsively to the nonce N; and

deleting the nonce N.

11. The method according to claim 7 , wherein the chip-security setup process further comprises the IC chip apparatus receiving the encrypted value E and the one-way function output-value H from a security-setup HSM.

12. A secure integrated circuit (IC) chip method, comprising:

performing a chip-security setup process, comprising:

storing an encrypted value E and a one-way function output-value H, which is an output value of a one-way function computed with a nonce N as input, in a memory of an IC chip apparatus; and

locking a portion of the IC chip apparatus from use; and

performing an unlock process, comprising:

generating an unlock request by an unlocking hardware security module (HSM);

providing, by the IC chip apparatus, the stored encrypted value E to the HSM responsively to the unlock request;

decrypting the encrypted value E by the HSM yielding a value N′;

providing, by the HSM, the value N′ to the IC chip apparatus;

computing, by the IC chip apparatus, a one-way function output-value H′ responsively to the value N′;

comparing, by the IC chip apparatus, the one-way function output-value H′ to the stored one-way function output-value H; and

unlocking, by the IC chip apparatus, the portion of the IC chip apparatus for use, responsively to a match between the value H′ and the value H.

13. The method according to claim 12 , wherein the chip-security setup process further comprises:

randomly generating the nonce N by the IC chip apparatus;

providing, by the IC chip apparatus, the nonce N to a security-setup HSM;

encrypting the nonce N and computing the one-way function with the nonce N as input by the security-setup HSM yielding the encrypted value E and the one-way function output-value H, respectively;

providing the encrypted value E and the one-way function output-value H to the IC chip apparatus; and

deleting the nonce N from the IC chip apparatus.

14. The method according to claim 13 , wherein:

the encrypting comprises encrypting the nonce N responsively to a public key of the unlocking HSM; and

the decrypting comprises decrypting the encrypted value E responsively to a private key of the unlocking HSM.

15. The method according to claim 12 , wherein the chip-security setup process further comprises:

randomly generating the nonce N by the IC chip apparatus;

computing, by the IC chip apparatus, the one-way function output-value H responsively to the nonce N;

providing, by the IC chip apparatus, the nonce N to a security-setup HSM;

encrypting the nonce N by the security-setup HSM yielding the encrypted value E;

providing the encrypted value E to the IC chip apparatus; and

deleting the nonce N from the IC chip apparatus.

16. The method according to claim 15 , wherein:

the encrypting comprises encrypting the nonce N responsively to a public key of the unlocking HSM; and

the decrypting comprises decrypting the encrypted value E responsively to a private key of the unlocking HSM.

17. The method according to claim 12 , wherein the chip-security setup process further comprises:

encrypting the nonce N and computing the one-way function with the nonce N as input by a security-setup HSM yielding the encrypted value E and the one-way function output-value H, respectively; and

providing the encrypted value E and the one-way function output-value H to the IC chip apparatus.

18. The method according to claim 17 , wherein:

the encrypting comprises encrypting the nonce N responsively to a public key of the unlocking HSM; and

the decrypting comprises decrypting the encrypted value E responsively to a private key of the unlocking HSM.

19. The method according to claim 12 , wherein the chip-security setup process further comprises performing by the IC chip apparatus:

randomly generating the nonce N by the IC chip apparatus;

encrypting the nonce N yielding the encrypted value E;

computing the one-way function with the nonce N as input yielding the one-way function output-value H; and

deleting the nonce N from the IC chip apparatus.

20. The method according to claim 19 , wherein:

the encrypting comprises encrypting the nonce N responsively to a public key of the unlocking HSM; and

the decrypting comprises decrypting the encrypted value E responsively to a private key of the unlocking HSM.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 29, 2020
From: TANAMI, OREN; HERSHMAN, ZIV
To: NUVOTON TECHNOLOGY CORPORATION
Reel/Frame 053468/0556 →
Continuity (1)
Related Publication 20210406405A1 · Dec 30, 2021
Cited By (1)
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