IP Library › Granted Patent US 11,416,649
Granted Patent B2
US 11,416,649 · App. 16/561,633 · Granted Aug 16, 2022

Method and system for part design using heterogeneous constraints

Inventors: Amirmassoud Mirzendehdel (San Mateo, CA); Morad Behandish (Mountain View, CA); Saigopal Nelaturi (Mountain View, CA)
Assignee: Palo Alto Research Center Incorporated
G06F30/17G06F2111/04G06F2111/20
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Quick Facts
Patent No.
US 11,416,649
App. No.
16/561,633
Filed
Sep 5, 2019
Granted
Aug 16, 2022
Kind
B2
Art Unit
2194
USPC
703/7
Abstract

A method of classifying design criteria includes receiving design criteria for a product part. The criteria comprise one or both of performance and manufacturing criteria. The design criteria are sorted into different classes of one or both of one or more objective functions and one or more constraints based on when they can be satisfied or optimized. Constraint violations are determined. A design workflow is produced to generate one or more designs of a part to comply with one or more of satisfying constraints and optimizing objective functions.

Claims (57)

1. A method of classifying design criteria comprising

receiving design criteria for a product part, the design criteria comprising one or both of performance and manufacturing criteria;

sorting the design criteria into different classes of one or both of one or more objective functions and one or more constraints based on when they can be satisfied or optimized;

determining constraint violations; and

producing a design workflow to generate one or more designs of a part to comply with one or more of satisfying the one or more constraints and optimizing the one or more objective functions.

2. The method of claim 1 , wherein types of the one or more constraints comprise one or more of set constraints, equality constraints, and inequality constraints.

3. The method of claim 1 , wherein scopes of the one or more constraints comprise one or more of global, local, and strictly local.

4. The method of claim 1 , further comprising computing one or more performance fields of the one or more designs.

5. The method of claim 4 , further comprising:

evaluating the one or more objective functions based on the performance fields; and

ordering the one or more designs based on the evaluated objective functions.

6. The method of claim 4 , further comprising:

computing the constraint violations based on the performance fields; and

determining if the one or more designs are feasible based on the computed constraint violations.

7. A system for classifying design criteria, comprising:

a processor; and

a memory storing computer program instructions which when executed by the processor cause the processor to perform operations comprising:

receiving design criteria for a product part, the criteria comprising one or both of performance and manufacturing criteria

sorting the design criteria into different classes of one or both of objective functions and constraints based on when they can be satisfied or optimized;

determining constraint violations; and

setting up a design workflow to generate one or more designs of a part to comply with one or more of satisfying constraints and optimizing objective functions.

8. The system of claim 7 , wherein types of the constraints comprise one or of set constraints, equality constraints, and inequality constraints.

9. The system of claim 7 , wherein scopes of the constraints comprise one or more of global, local, and strictly local.

10. The system of claim 7 , wherein the processor is further configured to compute one or more performance fields of the one of the one or more designs.

11. The system of claim 10 , wherein the processor is further configured to:

evaluate one or more objective functions based on the performance fields; and

order the one or more designs based on the evaluated objective functions.

12. The system of claim 10 , wherein the processor is further configured to:

compute the constraint violations based on the performance fields; and

determine if the one or more designs are feasible based on the computed constraint violations.

13. A method, comprising:

receiving one or more constraints for a design of a product part;

defining a feasible design space based on the one or more constraints;

pruning the design space based on a subset or all of the one or more constraints; and

exploring the pruned design space to produce one or more feasible part designs.

14. The method of claim 13 , further comprising:

evaluating point membership tests based on one or more feasibility predicates defined by pointwise constraints; and

computing maximal designs to represent the feasible design space with respect to the pointwise constraints.

15. The method of claim 13 , further comprising:

computing a measure of global changes of each of a plurality of constraint violations due to local variations in the one or more designs; and

determining a topological sensitivity field (TSF) by combining the measures of global changes of each of the plurality of constraint violations, the TSF configured to guide design space exploration to produce the feasible designs.

16. The method of claim 15 , wherein defining the feasible design space comprises using one or more of a density-based, a levelset shape, and a topology optimization approach.

17. The method of claim 16 , further comprising optimizing the one or more designs using augmented Lagrangians.

18. A system, comprising:

a processor;

a user interface; and

a memory storing computer program instructions which when executed by the processor cause the processor to perform operations comprising:

receiving one or more constraints for a design of a product part via the user interface;

defining a feasible design space based on the one or more constraints;

pruning the design space based on a subset or all of the constraints; and

exploring the pruned design space to produce one or more feasible part designs.

19. The system of claim 18 , wherein the processor is further configured to perform:

evaluating point membership tests based on one or more feasibility predicates defined by pointwise constraints; and

computing maximal designs to represent the feasible design space with respect to the pointwise constraints.

20. The system of claim 18 , wherein the processor is further configured to perform:

computing a measure of global changes of each of a plurality of constraint violations due to local variations in the one or more designs; and

determining a topological sensitivity field (TSF) by combining the measures of global changes of each of the plurality of constraint violations, the TSF configured to guide design space exploration to produce the feasible designs.

Assignments (9)
SECOND LIEN NOTES PATENT SECURITY AGREEMENT Recorded Jul 2, 2025
From: XEROX CORPORATION
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 071785/0550 →
FIRST LIEN NOTES PATENT SECURITY AGREEMENT Recorded Apr 11, 2025
From: XEROX CORPORATION
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 070824/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT RF 064760/0389 Recorded Feb 13, 2024
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: XEROX CORPORATION
Reel/Frame 068261/0001 →
SECURITY INTEREST Recorded Feb 13, 2024
From: XEROX CORPORATION
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 066741/0001 →
SECURITY INTEREST Recorded Nov 20, 2023
From: XEROX CORPORATION
To: JEFFERIES FINANCE LLC, AS COLLATERAL AGENT
Reel/Frame 065628/0019 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVAL OF US PATENTS 9356603, 10026651, 10626048 AND INCLUSION OF US PATENT 7167871 PREVIOUSLY RECORDED ON REEL 064038 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jun 28, 2023
From: PALO ALTO RESEARCH CENTER INCORPORATED
To: XEROX CORPORATION
Reel/Frame 064161/0001 →
SECURITY INTEREST Recorded Jun 22, 2023
From: XEROX CORPORATION
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 064760/0389 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 20, 2023
From: PALO ALTO RESEARCH CENTER INCORPORATED
To: XEROX CORPORATION
Reel/Frame 064038/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 5, 2019
From: MIRZENDEHDEL, AMIRMASSOUD; BEHANDISH, MORAD; NELATURI, SAIGOPAL
To: PALO ALTO RESEARCH CENTER INCORPORATED
Reel/Frame 050283/0526 →
Continuity (1)
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