IP Library Granted Patent US 11,417,751
Granted Patent B2
US 11,417,751 · App. 16/837,432 · Granted Aug 16, 2022

Semiconductor device structure and method for forming the same

Inventors: Tze-Chung Lin (Hsinchu, TW); Han-Yu Lin (Nantou County, TW); Li-Te Lin (Hsinchu, TW); Pinyen Lin (Rochester, NY)
Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
H01L29/66545H01L21/823431H01L29/42392H01L29/6653H01L29/6656H01L29/66553H01L29/66795H01L29/785
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Quick Facts
Patent No.
US 11,417,751
App. No.
16/837,432
Granted
Aug 16, 2022
Kind
B2
Abstract

A method for forming a semiconductor device structure is provided. The method includes forming a plurality of first semiconductor layers and a plurality of second semiconductor layers on a substrate, and the first semiconductor layers and the second semiconductor layers are alternately stacked. The method also includes forming a dummy gate structure over the first semiconductor layers and the second semiconductor layers. The method further includes removing a portion of the first semiconductor layers and second semiconductor layers to form a trench, and removing the second semiconductor layers to form a recess between two adjacent first semiconductor layers. The method includes forming a dummy dielectric layer in the recess, and removing a portion of the dummy dielectric layer to form a cavity. The method also includes forming an inner spacer layer in the cavity.

Claims (66)

1. A method for forming a semiconductor device structure, comprising:

forming a plurality of first semiconductor layers and a plurality of second semiconductor layers on a substrate, wherein the first semiconductor layers and the second semiconductor layers are alternately stacked;

forming a dummy gate structure over the first semiconductor layers and the second semiconductor layers;

forming a first gate spacer layer and a second gate spacer layer adjacent to the dummy gate structure;

removing a portion of the first semiconductor layers and second semiconductor layers to form a trench;

removing the second semiconductor layers to form a recess between two adjacent first semiconductor layers, wherein the recess extends from a first sidewall of the first gate spacer layer to a second sidewall of the second gate spacer layer;

forming a dummy dielectric layer in the recess after the dummy gate structure is formed;

removing a portion of the dummy dielectric layer to form a cavity;

forming an inner spacer layer in the cavity;

removing the entire dummy dielectric layer to form a gap; and

forming a gate structure in the gap.

2. The method for forming the semiconductor device structure as claimed in claim 1 , further comprising:

forming an S/D structure in the trench, wherein the S/D structure is in direct contact with the inner spacer layer.

3. The method for forming the semiconductor device structure as claimed in claim 1 , further comprising:

forming the trench by using the first gate spacer layer and the second gate spacer layer as a mask.

4. The method for forming the semiconductor device structure as claimed in claim 3 , wherein there is an interface between the dummy dielectric layer and the inner spacer layer, and the interface is substantially aligned with the first sidewall of the first gate spacer layer and the second sidewall of the second gate spacer layer.

5. The method for forming the semiconductor device structure as claimed in claim 1 , further comprising:

removing the dummy gate structure,

wherein removing the entire dummy dielectric layer is performed after removing the dummy gate structure.

6. The method for forming the semiconductor device structure as claimed in claim 1 , wherein the dummy gate structure comprises a dummy gate dielectric layer and a dummy gate electrode layer over the dummy gate dielectric layer, and the method comprises:

removing the dummy gate electrode layer; and

removing the dummy gate dielectric layer,

wherein removing the entire dummy dielectric layer is simultaneously performed while removing the dummy gate dielectric layer.

7. The method for forming the semiconductor device structure as claimed in claim 1 , wherein the dummy dielectric layer and the inner spacer layer are made of different materials.

8. A method for forming a semiconductor device structure, comprising:

forming a fin structure over a substrate, wherein the fin structure comprises a plurality of first semiconductor layers and a plurality of second semiconductor layers alternately stacked;

forming a dummy gate structure over the fin structure;

removing a portion of the fin structure to form a recess between two adjacent first semiconductor layers;

forming a dummy dielectric layer in the recess after the dummy gate structure is formed, so that the first semiconductor layers and the dummy dielectric layer are alternately stacked, wherein the dummy dielectric layer is a continuous layer which in direct contact with a center of the first semiconductor layers;

removing a portion of the dummy dielectric layer to form a cavity;

forming an inner spacer layer in the cavity;

forming an S/D structure adjacent to the inner spacer layer;

removing the entire dummy dielectric layer to form a gap; and

forming a gate structure in the gap, wherein the inner spacer layer is between the gate structure and the S/D structure.

9. The method for forming the semiconductor device structure as claimed in claim 8 , further comprising:

removing a portion of the first semiconductor layers and second semiconductor layers to form a trench before forming the dummy dielectric layer; and

forming the S/D structure in the trench.

10. The method for forming the semiconductor device structure as claimed in claim 8 , further comprising:

removing the dummy gate structure,

wherein removing the entire dummy dielectric layer is performed after removing the dummy gate structure.

11. The method for forming the semiconductor device structure as claimed in claim 8 , further comprising:

forming a gate spacer layer adjacent to the dummy gate structure before removing the portion of the fin structure to form the recess between two adjacent first semiconductor layers.

12. The method for forming the semiconductor device structure as claimed in claim 11 , wherein the cavity is directly below the gate spacer layer.

13. The method for forming the semiconductor device structure as claimed in claim 8 , wherein the dummy gate structure comprises a dummy gate dielectric layer and a dummy gate electrode layer over the dummy gate dielectric layer, and the method comprises:

removing the dummy gate electrode layer; and

removing the dummy gate dielectric layer,

wherein removing the entire dummy dielectric layer is simultaneously performed while removing the dummy gate dielectric layer.

14. The method for forming the semiconductor device structure as claimed in claim 8 , wherein an interface between the dummy dielectric layer and the inner spacer layer is substantially vertical to a top surface of the substrate.

15. A method for forming a semiconductor device structure, comprising:

forming a plurality of first semiconductor layers and a plurality of second semiconductor layers on a substrate, wherein the first semiconductor layers and the second semiconductor layers are alternately stacked;

forming a dummy gate dielectric layer and a dummy gate electrode layer over the first semiconductor layers and the second semiconductor layers;

removing the entire second semiconductor layers to form a recess between two adjacent first semiconductor layers;

forming a dummy dielectric layer in the recess after the dummy gate dielectric layer and the dummy gate electrode layer are formed, wherein the dummy dielectric layer is between two adjacent first semiconductor layers;

removing the dummy gate electrode layer;

removing the dummy gate dielectric layer;

removing the entire dummy dielectric layer to form a gap; and

forming a gate structure in the gap, wherein the dummy dielectric layer is replaced by the gate structure.

16. The method for forming the semiconductor device structure as claimed in claim 15 , further comprising:

removing a portion of the dummy dielectric layer to form a cavity; and

forming an inner spacer layer in the cavity, wherein the inner spacer layer is in direct contact with the dummy dielectric layer.

17. The method for forming the semiconductor device structure as claimed in claim 16 , wherein the inner spacer layer has a curved surface that protrudes toward the dummy dielectric layer.

18. The method for forming the semiconductor device structure as claimed in claim 16 , further comprising:

forming an S/D structure adjacent to the inner spacer layer, wherein the inner spacer layer is between the dummy dielectric layer and the S/D structure.

19. The method for forming the semiconductor device structure as claimed in claim 15 , wherein the step of removing the dummy gate dielectric layer and the step of removing the entire dummy dielectric layer are simultaneously performed.

20. The method for forming the semiconductor device structure as claimed in claim 15 , further comprising:

forming a first gate spacer layer and a second gate spacer layer adjacent to the dummy gate electrode layer, wherein the recess extends from a first sidewall of the first gate spacer layer to a second sidewall of the second gate spacer layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 22, 2020
From: LIN, TZE-CHUNG; LIN, HAN-YU; LIN, LI-TE; LIN, PINYEN
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 052461/0659 →
Continuity (1)
Related Publication 20210313449A1 · Oct 7, 2021