Shunt resistor for detecting the status of an electrical energy storage unit
The invention relates to a shunt resistor ( 2 ) for detecting the status of an electrical energy storage unit ( 1 ), wherein the shunt resistor ( 2 ) comprises a first layer ( 4 ), a second layer ( 6 ) and a third layer ( 8 ). According to the invention, the layers ( 4, 6, 8 ) are arranged in a layered manner in a stacking direction (V), wherein the second layer ( 6 ) is arranged between the first layer ( 4 ) and the third layer ( 8 ), and wherein the layers ( 4, 6, 8 ) are in physical contact with one another at one of the sides having the greatest respective surface area, and wherein the layers ( 4, 6, 8 ) are arranged at least partially overlapping.
1. A shunt resistor ( 2 ) for detecting the status of an electrical energy storage unit ( 1 ), wherein the shunt resistor ( 2 ) has a first layer ( 4 ), a second layer ( 6 ) and a third layer ( 8 ), characterized in that the layers ( 4 , 6 , 8 ) are arranged in a layered manner in a direction of a stacking direction (V), wherein the second layer ( 6 ) is arranged between the first layer ( 4 ) and the third layer ( 8 ), and wherein the layers are each in physical contact with one another by way of sides respectively having a largest surface area, and wherein the layers ( 4 , 6 , 8 ) are arranged in an at least partially overlapping manner, wherein the shunt resistor ( 2 ) is provided with at least one recess ( 9 ) that extends through each of the first layer ( 4 ), second layer ( 6 ), and third layer ( 8 ) along the stacking direction (V), wherein an area of the shunt resistor ( 2 ) is reduced by a size of the at least one recess ( 9 ) in such a manner that a predefined resistance value of the shunt resistor ( 2 ) is achieved.
2. The shunt resistor ( 2 ) as claimed in claim 1 , characterized in that the individual layers ( 4 , 6 , 8 ) of the shunt resistor ( 2 ) are arranged in a direction of a longitudinal axis ( 11 ) of the layers and/or a transverse axis ( 13 ) of the layers in such a manner that a step profile ( 10 ) is produced when layering the individual layers ( 4 , 6 , 8 ) in the direction of the stacking direction (V).
3. The shunt resistor ( 2 ) as claimed in claim 2 , characterized in that the individual layers ( 4 , 6 , 8 ) of the shunt resistor ( 2 ) have different lengths in the direction of the longitudinal axis ( 11 ) of the layers ( 4 , 6 , 8 ) and/or the transverse axis ( 13 ) of the layers ( 4 , 6 , 8 ).
4. The shunt resistor ( 2 ) as claimed in claim 1 , characterized in that the individual layers ( 4 , 6 , 8 ) of the shunt resistor ( 2 ) are welded to one another.
5. The shunt resistor ( 2 ) as claimed in claim 1 , characterized in that the second layer ( 6 ) has a copper-nickel-manganese alloy.
6. The shunt resistor ( 2 ) as claimed in claim 5 , characterized in that the first layer ( 4 ) and the third layer ( 8 ) each comprise the materials of copper and/or aluminum.
7. The shunt resistor ( 2 ) as claimed in claim 1 , characterized in that the first layer ( 4 ) and the third layer ( 8 ) each comprise the materials of copper and/or aluminum.
8. An electronic energy storage unit ( 1 ) having the shunt resistor ( 2 ) as claimed in claim 1 .
9. A method for producing the shunt resistor ( 2 ) of claim 1 for detecting the status of the electrical energy storage unit ( 1 ), wherein the method comprises arranging the first layer ( 4 ), the second layer ( 6 ) and the third layer ( 8 ) in a layered manner in the direction of the stacking direction (V), wherein arranging the second layer ( 6 ) between the first layer ( 4 ) and the third layer ( 8 ), and arranging the layers ( 4 , 6 , 8 ) such that the layers ( 4 , 6 , 8 ) are each in physical contact with one another by way of one of the sides respectively having the largest surface area of a layer in such a manner that the layers ( 4 , 6 , 8 ) are arranged in an at least partially overlapping manner.
10. The method as claimed in claim 9 , further comprising arranging wherein the individual layers ( 4 , 6 , 8 ) of the shunt resistor ( 2 ) in the direction of a longitudinal axis ( 11 ) of the layers ( 4 , 6 , 8 ) and/or a transverse axis ( 13 ) of the layers ( 4 , 6 , 8 ) in such a manner that a step profile ( 10 ) is produced when layering the individual layers ( 4 , 6 , 8 ) in the direction of the stacking direction (V), as a result of which surfaces of the individual layers ( 4 , 6 , 8 ), in particular, become at least partially accessible in the direction of the stacking direction (V).
11. The shunt resistor ( 2 ) as claimed in claim 1 , characterized in that the individual layers ( 4 , 6 , 8 ) of the shunt resistor ( 2 ) are arranged in a direction of a longitudinal axis ( 11 ) of the layers and/or a transverse axis ( 13 ) of the layers in such a manner that a step profile ( 10 ) is produced when layering the individual layers ( 4 , 6 , 8 ) in the direction of the stacking direction (V), as a result of which surfaces of the individual layers ( 4 , 6 , 8 ) are at least partially accessible in the direction of the stacking direction.