Solid state drive device and method for fabricating solid state drive device

1. A solid state drive device comprising:

a substrate;

a first buffer chip disposed on the substrate;

a second buffer chip disposed on the first buffer chip;

a plurality of first nonvolatile memory chips connected to the second buffer chip through wire bonding;

a controller configured to transmit a control signal to the plurality of first nonvolatile memory chips through a first channel; and

a first redistribution layer disposed in the substrate and configured to electrically connect the first channel to the first buffer chip,

wherein the first buffer chip is connected to the first redistribution layer through flip chip bonding, and the second buffer chip is connected to the first redistribution layer through a first wire.

2. The solid state drive device of claim 1 , wherein the plurality of first nonvolatile memory chips includes a first nonvolatile memory chip bottom region, and a first nonvolatile memory chip top region disposed on the first nonvolatile memory chip bottom region, and

wherein the first nonvolatile memory chip top region is connected to the second buffer chip through a second wire, and the first nonvolatile memory chip bottom region is connected to the second buffer chip through a third wire.

3. The solid state drive device of claim 1 , further comprising:

a second redistribution layer disposed in the substrate and connected to the first buffer chip through the flip chip bonding; and

a plurality of second nonvolatile memory chips connected to the second redistribution layer through the wire bonding.

4. The solid state drive device of claim 3 , further comprising:

a third redistribution layer disposed in the substrate and connected to the first buffer chip through the flip chip bonding,

wherein the plurality of second nonvolatile memory chips includes a second nonvolatile memory chip bottom region, and a second nonvolatile memory chip top region disposed on the second nonvolatile memory chip bottom region, and

wherein the second nonvolatile memory chip top region is connected to the second redistribution layer through a fourth wire, and the second nonvolatile memory chip bottom region is connected to the third redistribution layer through a fifth wire.

5. The solid state drive device of claim 3 , wherein the first buffer chip and the second buffer chip are disposed between the plurality of first nonvolatile memory chips and the plurality of second nonvolatile memory chips.

6. The solid state drive device of claim 1 , further comprising:

a plurality of second nonvolatile memory chips disposed on the plurality of first nonvolatile memory chips; and

a second redistribution layer disposed in the substrate and connected to the first buffer chip through the flip chip bonding,

wherein the plurality of second nonvolatile memory chips is connected to the second redistribution layer through the wire bonding.

7. The solid state drive device of claim 6 , wherein the plurality of first nonvolatile memory chips is continuously disposed in a first direction, and the plurality of second nonvolatile memory chips is continuously disposed in a second direction intersecting the first direction.

8. The solid state drive device of claim 6 , further comprising:

a third redistribution layer disposed in the substrate and connected to the first buffer chip through the flip chip bonding,

wherein the plurality of first nonvolatile memory chips includes a first nonvolatile memory chip bottom region continuously disposed in a first direction, and a first nonvolatile memory chip top region disposed on the first nonvolatile memory chip bottom region and continuously disposed in a second direction intersecting the first direction,

wherein the plurality of second nonvolatile memory chips includes a second nonvolatile memory chip bottom region continuously disposed in the first direction, and a second nonvolatile memory chip top region disposed on the second nonvolatile memory chip bottom region and continuously disposed in the second direction,

wherein the first nonvolatile memory chip top region is connected to the second buffer chip through a second wire,

wherein the first nonvolatile memory chip bottom region is connected to the second buffer chip through a third wire,

wherein the second nonvolatile memory chip top region is connected to the second redistribution layer through a fourth wire, and

wherein the second nonvolatile memory chip bottom region is connected to the third redistribution layer through a fifth wire.

9. The solid state drive device of claim 1 , further comprising:

a lower substrate;

a lower first buffer chip disposed on the lower substrate;

a lower second buffer chip disposed on the lower first buffer chip;

a plurality of lower first nonvolatile memory chips connected to the lower second buffer chip through the wire bonding;

a second channel configured to transmit the control signal to the plurality of lower first nonvolatile memory chips; and

a lower first redistribution layer configured to electrically connect the second channel and the lower first buffer chip,

wherein the lower first buffer chip is connected to the lower first redistribution layer through the flip chip bonding, and the lower second buffer chip is connected to the lower first redistribution layer through a lower first wire.

10. The solid state drive device of claim 9 , wherein lower sides of the first buffer chip, the second buffer chip, and the plurality of first nonvolatile memory chips face lower sides of the lower first buffer chip, the lower second buffer chip, and the plurality of lower first nonvolatile memory chips.

11. The solid state drive device of claim 1 , wherein the second buffer chip extends in a first direction from a first point to a second point,

wherein the second buffer chip includes a plurality of buffer chip pads disposed continuously in the first direction,

wherein the plurality of buffer chip pads are spaced at regular intervals,

wherein a smallest distance between the first point and the plurality of buffer chip pads is a first distance,

wherein a smallest distance between the second point and the plurality of buffer chip pads is a second distance, and

wherein the first distance is equal to the second distance.

12. A solid state drive device comprising:

a first buffer chip;

a supporting film disposed on the first buffer chip;

a second buffer chip disposed on the supporting film;

a plurality of first nonvolatile memory chips connected to the second buffer chip through a wire bonding;

a first redistribution layer connected to the first buffer chip and the second buffer chip through the wire bonding; and

a controller configured to transmit a control signal to the plurality of first nonvolatile memory chips through a first channel electrically connected to the first redistribution layer.

13. The solid state drive device of claim 12 , wherein the supporting film includes a Die Attach Film (DAF).

14. The solid state drive device of claim 12 , further comprising:

a spacer film disposed on the plurality of first nonvolatile memory chips; and

a plurality of second nonvolatile memory chips disposed on the spacer film.

15. The solid state drive device of claim 14 , wherein the spacer film includes silicon.

16. The solid state drive device of claim 14 , wherein the plurality of first nonvolatile memory chips and the plurality of second nonvolatile memory chips are continuously disposed in a first direction.

17. The solid state drive device of claim 12 , further comprising:

a lower first buffer chip;

a lower supporting film disposed on the lower first buffer chip;

a lower second buffer chip disposed on the lower supporting film;

a plurality of lower first nonvolatile memory chips connected to the lower second buffer chip through the wire bonding;

a lower first redistribution layer connected to the lower first buffer chip and the lower second buffer chip through the wire bonding; and

a second channel electrically connected to the lower first redistribution layer and configured to transmit the control signal to the plurality of lower first nonvolatile memory chips.

18. The solid state drive device of claim 17 , wherein lower sides of the first buffer chip, the supporting film, the second buffer chip, and the plurality of first nonvolatile memory chips face lower sides of the lower first buffer chip, the lower supporting film, the lower second buffer chip, and the plurality of lower first nonvolatile memory chips.

19. A solid state drive device comprising:

a substrate;

a first buffer chip on one side of the substrate;

a second buffer chip disposed on the first buffer chip;

a first redistribution layer, a second redistribution layer, and a third redistribution layer which are formed in the substrate and connected to the first buffer chip in through a flip chip bonding, wherein the first redistribution layer is electrically connected to the first buffer chip through a first connection terminal, the second redistribution layer is electrically connected to the first buffer chip through a second connection terminal, and the third redistribution layer is electrically connected to the first buffer chip through a third connection terminal;

a plurality of first nonvolatile memory chips including a first nonvolatile memory chip bottom region connected to the second buffer chip by a first wire, and a first nonvolatile memory chip top region connected to the second buffer chip by a second wire and disposed on the first nonvolatile memory chip bottom region;

a controller connected to the first redistribution layer and configured to transmit a control signal to the first buffer chip through a first channel;

a plurality of external connection terminals connected to the first channel and disposed on a back side of the substrate facing one side of the substrate; and

a plurality of second nonvolatile memory chips including a second nonvolatile memory chip bottom region connected to the third redistribution layer by a third wire, and a second nonvolatile memory chip top region connected to the second redistribution layer by a fourth wire and disposed on the second nonvolatile memory chip bottom region,

wherein the second buffer chip is electrically connected to the first redistribution layer through a fifth wire.

20. The solid state drive device of claim 19 , wherein the first buffer chip and the second buffer chip are disposed between the plurality of first nonvolatile memory chips and the plurality of second nonvolatile memory chips.