IP Library › Granted Patent US 11,424,191
Granted Patent B2
US 11,424,191 · App. 16/917,388 · Granted Aug 23, 2022

Semiconductor devices and methods of manufacture

Inventors: Hsien-Wei Chen (Hsinchu, TW); Ming-Fa Chen (Taichung, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
H01L23/5389H01L21/4853H01L21/4857H01L21/565H01L21/568H01L21/6835H01L21/78H01L23/3128H01L23/5383H01L23/5386H01L24/19H01L24/20H01L25/105H01L25/50H01L2221/68372H01L2224/214H01L2224/2105H01L2225/1035H01L2225/1058
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Quick Facts
Patent No.
US 11,424,191
App. No.
16/917,388
Granted
Aug 23, 2022
Kind
B2
Abstract

A semiconductor device and method of manufacture are provided wherein semiconductor devices are attached over a semiconductor substrate. An opening is formed within metallization layers over the semiconductor substrate and the semiconductor substrate, and an encapsulant is placed to fill the opening. Once the encapsulant is placed, the semiconductor substrate is singulated to separate the devices. By recessing the material of the metallization layers and forming the opening, delamination damage may be reduced or eliminated.

Claims (41)

1. A semiconductor device comprising:

metallization layers connecting active devices on a semiconductor substrate;

through substrate vias extending through the semiconductor substrate;

redistribution layers connected to the through substrate vias;

a passivation layer adjacent to the redistribution layers;

a first semiconductor device connected to the metallization layers;

a second semiconductor device connected to the metallization layers; and

an encapsulant encapsulating the first semiconductor device and the second semiconductor device, wherein the encapsulant has a first surface, the first surface being in physical contact with the metallization layers and the semiconductor substrate, the first surface having indentations into the metallization layers and the semiconductor substrate.

2. The semiconductor device of claim 1 , wherein the encapsulant comprises a molding compound.

3. The semiconductor device of claim 1 , wherein the encapsulant comprises silicon oxide.

4. The semiconductor device of claim 3 , wherein a support structure is attached to the silicon oxide.

5. The semiconductor device of claim 1 , wherein the encapsulant reduces in width as the encapsulant extends into the semiconductor substrate.

6. The semiconductor device of claim 1 , wherein the passivation layer has a curved sidewall.

7. The semiconductor device of claim 1 , further comprising a second encapsulant extending through the passivation layer and into the semiconductor substrate.

8. A semiconductor device comprising:

a first semiconductor die bonded to a metallization layer over a semiconductor substrate;

a second semiconductor die bonded to the metallization layer;

a first encapsulant extending between the first semiconductor die and the second semiconductor die, the first encapsulant also extending through the metallization layer to make physical contact with the semiconductor substrate;

through substrate vias extending through the semiconductor substrate;

redistribution layers connected to the through substrate vias;

a passivation layer adjacent to the redistribution layers; and

a second encapsulant extending through the redistribution layers to make physical contact with the semiconductor substrate.

9. The semiconductor device of claim 8 , wherein the first encapsulant has a first width adjacent to the metallization layer and a second width less than the first width adjacent to the semiconductor substrate.

10. The semiconductor device of claim 8 , wherein the first encapsulant has a first surface that is planar with a second surface of the semiconductor substrate.

11. The semiconductor device of claim 8 , wherein the first encapsulant is an oxide material.

12. The semiconductor device of claim 11 , further comprising a support structure attached to the oxide material.

13. The semiconductor device of claim 8 , wherein the second encapsulant comprises a non-polymer gap-filler material.

14. The semiconductor device of claim 8 , wherein the second encapsulant has an irregular shape penetrating into the redistribution layers and the semiconductor substrate.

15. A semiconductor device comprising:

a first semiconductor die bonded to a device, wherein the first semiconductor die is bonded to the device by a first metal to metal bond, the device comprising a semiconductor substrate;

through substrate vias located within the semiconductor substrate;

redistribution layers in electrical connection with the through substrate vias;

a passivation layer over the redistribution layers;

a second semiconductor die bonded to the device;

an opening along a sidewall of the semiconductor substrate; and

a fill material filling the opening, wherein the fill material has a sidewall coplanar with the semiconductor substrate.

16. The semiconductor device of claim 15 , further comprising a second opening extending through the passivation layer and into the semiconductor substrate.

17. The semiconductor device of claim 16 , further comprising a second fill material filling the second opening.

18. The semiconductor device of claim 15 , wherein the fill material comprises an oxide material.

19. The semiconductor device of claim 18 , further comprising a support structure attached to the oxide material.

20. The semiconductor device of claim 15 , wherein the fill material comprises a molding compound.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 20, 2020
From: CHEN, HSIEN-WEI; CHEN, MING-FA
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 054148/0125 →
Continuity (1)
Related Publication 20210407920A1 · Dec 30, 2021
Cited By (2)
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