IP Library › Granted Patent US 11,424,724
Granted Patent B2
US 11,424,724 · App. 16/731,256 · Granted Aug 23, 2022

Ampilfier with VCO-based ADC

Inventors: Martin Kinyua (Cedar Park, TX); Eric Soenen (Austin, TX)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
H03F3/2175H03F1/0233H03F3/185H03M3/424H03M3/494
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Quick Facts
Patent No.
US 11,424,724
App. No.
16/731,256
Granted
Aug 23, 2022
Kind
B2
Abstract

An amplifier includes an input circuit configured to receive an analog input signal and a feedback signal, and output an analog error signal based on the analog input signal and the feedback signal. An ADC is configured to convert the analog error signal into a digital signal in a phase domain. A digital control circuit is configured to generate a digital control signal based on the digital signal in the phase domain. An output circuit is configured to generate an amplified output signal based on the digital control signal, and a feedback circuit is configured generate the feedback signal based on the amplified output signal.

Claims (36)

1. An amplifier, comprising:

an input circuit configured to receive an analog input signal and a feedback signal, and output an analog error signal based on the analog input signal and the feedback signal;

an analog-to-digital converter (ADC) configured to convert the analog error signal into a digital signal in a phase domain;

a digital control circuit configured to generate a digital control signal based on the digital signal in the phase domain;

an output circuit configured to generate an amplified output signal based on the digital control signal;

a feedback circuit configured to generate the feedback signal based on the amplified output signal, and

wherein the ADC includes a voltage controlled oscillator (VCO) configured to output a frequency signal based on the analog error signal.

2. The amplifier of claim 1 , wherein the digital control signal is a pulse width modulated (PWM) signal.

3. The amplifier of claim 1 , wherein the ADC includes a Delta-Sigma ADC.

4. The amplifier of claim 1 , wherein the ADC includes a phase quantizer configured to convert the frequency signal output by the VCO to a phase signal.

5. The amplifier of claim 4 , wherein the phase quantizer is configured to compare the phase signal to a reference frequency.

6. The amplifier of claim 5 , wherein the phase quantizer includes an exclusive OR (XOR) gate configured to receive the phase signal and the reference signal as inputs.

7. The amplifier of claim 1 , wherein the digital control circuit includes a digital filter configured to receive the phase signal.

8. The amplifier of claim 7 , wherein the digital filter includes a loop filter having an equivalent Laplace transfer function with at least one zero and one pole.

9. The amplifier of claim 1 , wherein the feedback circuit includes a voltage divider.

10. The amplifier of claim 9 , wherein the feedback circuit includes a filter.

11. The amplifier of claim 3 , wherein the ADC includes a digital-to-analog converter (DAC) configured to convert the digital signal in the phase domain into an analog feedback signal received by the VCO.

12. The amplifier of claim 1 , wherein the analog input signal is a differential input signal, and wherein the amplified output signal is a differential output signal.

13. The amplifier of claim 1 , wherein the VCO is configured to receive the analog error signal directly from the input circuit.

14. The amplifier of claim 1 , wherein the amplifier is a Class D amplifier.

15. A circuit, comprising:

an input circuit configured to receive an analog input signal and a feedback signal, and output an analog error signal based on the analog input signal and the feedback signal;

an analog-to-digital converter (ADC) including a voltage controlled oscillator (VCO) configured to receive the analog error signal and output a frequency signal based on the analog error signal;

a quantizer configured to receive the frequency signal and compare the frequency signal to a reference signal to output a phase signal based on the frequency signal; and

a digital control circuit configured to receive the phase signal and output a pulse width modulated (PWM) signal based on the phase signal.

16. The circuit claim 15 , further comprising an output driver configured to generate an output signal based on the PWM signal.

17. The circuit claim 15 , wherein the ADC includes a Delta-Sigma ADC, and wherein the Delta-Sigma ADC includes a digital-to-analog converter (DAC) configured to convert the phase signal into an analog feedback signal.

18. The circuit claim 15 , wherein the quantizer includes an exclusive OR (XOR) gate configured to receive the phase signal and the reference signal as inputs.

19. A method, comprising:

receiving an analog input voltage signal;

comparing the analog input signal to a feedback signal to determine an analog error signal;

converting the analog error signal into a frequency signal with a voltage controlled oscillator (VCO) based on the analog error signal;

converting the frequency signal into a phase signal, including comparing the frequency signal to a reference signal;

converting the phase signal into a digital control signal based on the phase signal; and

generating an output signal based the digital control signal.

20. The method of claim 19 , further comprising filtering the output signal to generate the feedback signal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 30, 2020
From: KINYUA, MARTIN; SOENEN, ERIC
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 051666/0581 →
Continuity (1)
Related Publication 20210203287A1 · Jul 1, 2021
Cited By (1)
US 12,574,042