High speed bidirectional optical time-domain reflectometer (OTDR)-based testing of device under test
In some examples, high speed bidirectional OTDR-based testing may include transmitting data from a first end of a device under test (DUT) towards an optical time-domain reflectometer (OTDR) that is operatively connected to a second opposite end of the DUT. Further data that is transmitted by the OTDR may be received from the second opposite end of the DUT towards the first end of the DUT. Based on an amplitude of the further data, a direction of receiving of the further data may be adjusted towards a first receiver or towards a second receiver.
1. An apparatus comprising:
a data transmitter, executed by at least one hardware processor, to
transmit data from a first end of a device under test (DUT) towards an optical time-domain reflectometer (OTDR) that is operatively connected to a second opposite end of the DUT;
a data receiver, executed by the at least one hardware processor, to
receive further data that is transmitted by the OTDR from the second opposite end of the DUT towards the first end of the DUT; and
a receiver level controller, executed by the at least one hardware processor, to
adjust, based on an amplitude of the further data, a direction of receiving of the further data towards a first receiver of the data receiver or towards a second receiver of the data receiver.
2. The apparatus according to claim 1 , wherein the DUT includes a fiber optic link.
3. The apparatus according to claim 1 , wherein the receiver level controller includes a tap optical coupler to extract part of optical power received from the OTDR connected to the second opposite end of the DUT.
4. The apparatus according to claim 3 , further comprising:
a tap PIN photodiode operatively connected to the tap optical coupler to convert an optical data stream, which corresponds to the further data, in an electric domain.
5. The apparatus according to claim 1 , wherein the receiver level controller is executed by the at least one hardware processor to adjust, based on the amplitude of the further data, the direction of receiving of the further data towards the first receiver of the data receiver or towards the second receiver of the data receiver by:
adjusting, based on the amplitude of the further data, the direction of receiving of the further data towards the first receiver that includes a low amplitude designated receiver or towards the second receiver that includes a high amplitude designated receiver.
6. The apparatus according to claim 5 , wherein the receiver level controller is executed by the at least one hardware processor to adjust, based on the amplitude of the further data, the direction of receiving of the further data towards the first receiver that includes the low amplitude designated receiver by:
adjusting, based on the amplitude of the further data, the direction of receiving of the further data towards the low amplitude designated receiver that includes an avalanche photodiode.
7. The apparatus according to claim 6 , wherein the receiver level controller is executed by the at least one hardware processor to adjust, based on the amplitude of the further data, the direction of receiving of the further data towards the first receiver that includes the low amplitude designated receiver by:
adjusting, based on the amplitude of the further data, the direction of receiving of the further data towards the low amplitude designated receiver that includes a transimpedance amplifier operatively connected to the avalanche photodiode.
8. The apparatus according to claim 5 , wherein the receiver level controller is executed by the at least one hardware processor to adjust, based on the amplitude of the further data, the direction of receiving of the further data towards the second receiver that includes the high amplitude designated receiver by:
adjusting, based on the amplitude of the further data, the direction of receiving of the further data towards the high amplitude designated receiver that includes a tap PIN photodiode.
9. The apparatus according to claim 8 , wherein the receiver level controller is executed by the at least one hardware processor to adjust, based on the amplitude of the further data, the direction of receiving of the further data towards the second receiver that includes the high amplitude designated receiver by:
adjusting, based on the amplitude of the further data, the direction of receiving of the thither data towards the high amplitude designated receiver that includes a transimpedanee PIN amplifier operatively connected to the tap PIN photodiode.