IP Library › Granted Patent US 11,431,469
Granted Patent B2
US 11,431,469 · App. 17/271,835 · Granted Aug 30, 2022

Transmission device, reception device, and transceiver system

Inventor: Takashi Masuda (Kanagawa, JP)
Assignee: Sony Semiconductor Solutions Corporation
H04L7/06H04L7/0012
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Quick Facts
Patent No.
US 11,431,469
App. No.
17/271,835
Granted
Aug 30, 2022
Kind
B2
Abstract

An objective of the present technology is to provide a transmission device, a reception device, and a transceiver system of which miniaturization can be achieved. The transmission device includes an oscillator configured to oscillate a first clock signal; and a register signal reception unit configured to receive a register signal transmitted from a reception device and used for controlling the first clock signal. The reception device includes a signal generation unit configured to generate a register signal for controlling a first clock signal transmitted from the transmission device based on a comparison result obtained by comparing a reference clock signal with one of the first clock signal and a second clock signal which is based on the first clock signal; and a register signal transmission unit configured to transmit the register signal generated by the signal generation unit to the transmission device.

Claims (30)

1. A transmission device comprising:

an oscillator configured to oscillate a first clock signal;

a control signal receiver configured to receive a control signal transmitted from an external device and used for controlling the first clock signal;

a data transmitter configured to transmit data input from a data generator to the external device, the data transmitter including a divider that divides the first clock signal input from the oscillator and generates a second clock signal with a lower frequency than the first clock signal, the data transmitter further including a parallel-serial converter configured to convert data input in a parallel form from the data generator in synchronization with the second clock signal into data with a serial form synchronized with the first clock signal, and transmission driving circuitry configured to transmit the data with the serial form synchronized with the first clock signal to the external device.

2. The transmission device according to claim 1 , further comprising:

a memory configured to store a setting value of a frequency of the first clock signal oscillated by the oscillator.

3. The transmission device according to claim 1 , wherein the data transmitter transmits a signal for embedding the first clock signal in the data to the external device.

4. The transmission device according to claim 1 , wherein the transmission device includes a plurality of data transmitters, and the data transmitter is one of the plurality of data transmitters.

5. The transmission device according to claim 1 , further comprising:

a clock signal transmitter connected to the oscillator and configured to transmit the first clock signal to the external device.

6. A reception device comprising:

a signal generator configured to generate a control signal for controlling a first clock signal transmitted from an external device based on a comparison result obtained by comparing a reference clock signal with one of the first clock signal and a second clock signal which is based on the first clock signal;

a signal transmitter configured to transmit the control signal generated by the signal generator to the external device; and

a data receiver configured to receive data transmitted from the external device in synchronization with the first clock signal, the data receiver including a divider that divides a frequency of the first clock signal input from the external device to generate the second clock signal, the data receiver further including a serial-parallel converter configured to convert data input in a serial form from the external device in synchronization with the first clock signal into data with a parallel form synchronized with the second clock signal.

7. The reception device according to claim 6 , wherein the data receiver includes a memory that temporarily stores the data transmitted from the external device in synchronization with the first clock signal.

8. The reception device according to claim 6 , wherein the data receiver includes reproduction circuitry configured to reproduce the first clock signal embedded in the data and transmitted from the external device from the data.

9. The reception device according to claim 6 , wherein the reception device includes a plurality of data receivers, and the data receiver is one of the plurality of data receivers.

10. The reception device according to claim 6 , further comprising:

a clock signal receiver configured to receive the first clock signal transmitted from the external device.

11. A transceiver system comprising:

a transmission device configured to transmit predetermined signals; and a

reception device configured to receive the predetermined signals transmitted from the transmission device, wherein

the transmission device includes an oscillator that oscillates a first clock signal which is one of the predetermined signals, and

a receiver configured to receive a control signal transmitted from the reception device and used for controlling the first clock signal, and

the reception device includes

a signal generator configured to generate the control signal based on a comparison result obtained by comparing a reference clock signal with one of the first clock signal transmitted from the transmission device and a second clock signal which is based on the first clock signal,

a signal transmitter configured to transmit the control signal generated by the signal generator to the transmission device, and

a data receiver configured to receive data transmitted from the transmission device in synchronization with the first clock signal, the data receiver including a divider that divides a frequency of the first clock signal input from the transmission device to generate the second clock signal, the data receiver further including a serial-parallel converter configured to convert data input in a serial form from the transmission device in synchronization with the first clock signal into data with a parallel form synchronized with the second clock signal.

12. The transceiver system according to claim 11 , wherein

bi-directional communication is performed between the transmission device and the reception device.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 26, 2021
From: MASUDA, TAKASHI
To: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Reel/Frame 055424/0675 →
Priority Claims (1)
JP JP2018-187721 · Oct 2, 2018 · national
Continuity (1)
Related Publication 20210320783A1 · Oct 14, 2021