IP Library › Granted Patent US 11,437,273
Granted Patent B2
US 11,437,273 · App. 16/798,817 · Granted Sep 6, 2022

Self-aligned contact and contact over active gate structures

Inventors: Yuriy Shusterman (Ballston Lake, NY); Madhur Sachan (Belmont, CA); Susmit Singha Roy (Sunnyvale, CA); Regina Freed (Los Altos, CA); Sanjay Natarajan (Portland, OR)
Assignee: Micromaterials LLC
H01L21/76897H01L21/76808H01L21/76843H01L21/823437H01L21/823475H01L29/41775H01L29/42372H01L29/45H01L29/4958H01L29/6653H01L29/6656H01L21/823431H01L27/0886H01L2221/1026
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Quick Facts
Patent No.
US 11,437,273
App. No.
16/798,817
Granted
Sep 6, 2022
Kind
B2
Abstract

Methods of forming and processing semiconductor devices which utilize a three-color process are described. Certain embodiments relate to the formation of self-aligned contacts for metal gate applications. More particularly, certain embodiments relate to the formation of self-aligned gate contacts utilizing the formation of self-aligned growth pillars. The pillars lead to taller gate heights and increased margins against shorting defects.

Claims (15)

1. A method of manufacturing an electronic device, the method comprising:

providing a substrate having an active region with at least one gate stack formed thereon, the at least one gate stack having a first side and a second side and comprising a gate metal having a thickness in a range of about 0.5 nm to about 2000 nm, a source/drain on the substrate, and a sacrificial material on the source/drain;

forming pillars on the gate metal;

forming a spacer material on the first side and second side of the pillars;

removing the sacrificial material to form an opening to the source/drain;

depositing a metal in the opening to form a source/drain contact;

removing the pillars to form trenches; and

depositing a dielectric material through the trenches onto the gate metal.

2. The method of claim 1 , further comprising recessing the source/drain contact to form gaps between the pillars and depositing a second dielectric material into the gaps.

3. The method of claim 1 , further comprising, prior to depositing a metal, depositing a liner material in the trenches to form a contact liner around the source/drain contact.

4. The method of claim 1 , wherein a gate liner surrounds the gate metal.

5. The method of claim 1 , further comprising selectively growing a seed layer on the gate metal, wherein the pillars are formed on the seed layer.

6. The method of claim 4 , further comprising, prior to depositing the dielectric material, removing the gate liner and etching the spacer material.

7. The method of claim 1 , further comprising, prior to depositing the dielectric material, removing the spacer material.

8. The method of claim 6 , further comprising depositing a contact on the source/drain contact.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 18, 2020
From: SHUSTERMAN, YURIY; SACHAN, MADHUR; ROY, SUSMIT SINGHA; FREED, REGINA; NATARAJAN, SANJAY
To: MICROMATERIALS LLC
Reel/Frame 052151/0585 →
Continuity (2)
Provisional Application 62812575 · Mar 1, 2019
Related Publication 20200279773A1 · Sep 3, 2020