IP Library › Granted Patent US 11,437,367
Granted Patent B2
US 11,437,367 · App. 16/854,313 · Granted Sep 6, 2022

Heterogeneous integrated wideband high electron mobility transistor power amplifier with a single-crystal acoustic resonator/filter

Inventors: Je-Hsiung Lan (San Diego, CA); Ranadeep Dutta (Del Mar, CA); Jonghae Kim (San Diego, CA)
Assignee: QUALCOMM Incorporated
H01L27/0688H01L29/2003H01L29/66462H01L29/778H03F3/213
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Quick Facts
Patent No.
US 11,437,367
App. No.
16/854,313
Granted
Sep 6, 2022
Kind
B2
Abstract

A 3D integrated circuit (3D IC) chip is described. The 3D IC chip includes a die having a compound semiconductor high electron mobility transistor (HEMT) active device. The compound semiconductor HEMT active device is composed of compound semiconductor layers on a single crystal, compound semiconductor layer. The 3D IC chip also includes an acoustic device integrated in the single crystal, compound semiconductor layer. The 3D IC chip further includes a passive device integrated in back-end-of-line layers of the die on the single crystal, compound semiconductor layer.

Claims (34)

1. A 3D integrated circuit (3D IC) chip, comprising:

a die including a compound semiconductor high electron mobility transistor (HEMT) active device comprising compound semiconductor layers on a single crystal, compound semiconductor layer;

a bulk acoustic wave (X-BAW) device integrated in the single crystal, compound semiconductor layer;

an interlayer dielectric on the single crystal, compound semiconductor layer and on the compound semiconductor HEMT active device;

a reflector in the interlayer dielectric and coupled to the X-BAW device; and

a passive device integrated in back-end-of-line layers of the die on the single crystal, compound semiconductor layer.

2. The 3D IC chip of claim 1 , in which the compound semiconductor layers comprise gallium nitride (GaN) and aluminum gallium nitride (AlGaN) layers.

3. The 3D IC chip of claim 1 , in which the single crystal, compound semiconductor layer comprises a single crystal (X) aluminum nitride (X-AlN) layer.

4. The 3D IC chip of claim 1 , further comprising an air cavity in the interlayer dielectric and surrounding a portion of the reflector and the X-BAW device.

5. The 3D IC chip of claim 1 , further comprising:

a substrate coupled to the interlayer dielectric, being distal from the single crystal, compound semiconductor layer.

6. The 3D IC chip of claim 5 , further comprising a bond layer between the substrate and the interlayer dielectric.

7. The 3D IC chip of claim 5 , in which the substrate comprises alumina (Al 2 O 3 ).

8. The 3D IC chip of claim 1 , in which the compound semiconductor HEMT active device comprises a heterogeneous wideband HEMT power amplifier (PA).

9. The 3D IC chip of claim 1 , in which the passive device comprises a capacitor coupled to an inductor.

10. The 3D IC chip of claim 9 , in which the capacitor comprises a metal-insulator-metal (MIM) capacitor and the inductor comprises redistribution layers of the back-end-of-line layers.

11. A method of making a 3D integrated circuit (3D IC) chip, comprising:

epitaxially growing a single crystal, compound semiconductor layer on a semiconductor substrate;

epitaxially growing compound semiconductor layers on the single crystal, compound semiconductor layer;

fabricating a compound semiconductor high electron mobility transistor (HEMT) active device from the compound semiconductor layers on the single crystal, compound semiconductor layer on the semiconductor substrate;

forming a bulk acoustic wave (X-BAW) device in the single crystal, compound semiconductor layer;

depositing an interlayer dielectric on the single crystal, compound semiconductor layer and on the compound semiconductor HEMT active device;

forming a reflector in the interlayer dielectric and coupled to the X-BAW device; and

fabricating a passive device in back-end-of-line layers of the 3D IC chip on the single crystal, compound semiconductor layer.

12. The method of claim 11 , in which epitaxially growing the single crystal, compound semiconductor layer comprises growing a single crystal (X) aluminum nitride (X-AlN) layer on the semiconductor substrate.

13. The method of claim 12 , in which epitaxially growing the compound semiconductor layers comprises growing gallium nitride (GaN) and aluminum gallium nitride (AlGaN) layers on the X-AlN layer.

14. The method of claim 11 , in which fabricating the passive device comprises:

depositing a first electrode and a second electrode separated by a dielectric layer to form a metal insulator metal (MIM) capacitor in a first back-end-of-line (BEOL) interlayer dielectric (ILD) layer on a backside surface of the single crystal, compound semiconductor layer;

depositing a redistribution layer on the first BEOL ILD layer to form an inductor; and

interconnecting the MIM capacitor and the inductor to form the passive device.

15. The method of claim 11 , further comprising:

removing the semiconductor substrate to expose a backside surface of the single crystal, compound semiconductor layer; and

bonding a thermally conductive substrate to the interlayer dielectric on a front side surface of the single crystal, compound semiconductor layer and on the compound semiconductor HEMT active device.

16. The method of claim 11 , further comprising forming an air cavity in the interlayer dielectric and surrounding a portion of the reflector and the X-BAW device.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 20, 2020
From: LAN, JE-HSIUNG; DUTTA, RANADEEP; KIM, JONGHAE
To: QUALCOMM INCORPORATED
Reel/Frame 053553/0315 →
Continuity (1)
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