Manufacturing method of semiconductor memory device and semiconductor memory device

1. A manufacturing method of a semiconductor memory device, comprising:

forming a stacked body in which a plurality of first layers are stacked while being separated from one another;

forming a first mask pattern having a first opening and a plurality of second openings above the stacked body;

forming a second mask pattern covering some of the plurality of second openings; and

etching the stacked body with the first mask pattern as a mask while sequentially exposing the plurality of second openings by causing an end of the second mask pattern to retreat to form a first hole extending in the stacked body in a stacking direction of the stacked body at a position of the first opening and form a plurality of second holes extending in the stacked body to different depths in the stacking direction at positions of the plurality of second openings, and reaching first layers of the plurality of first layers at different levels, wherein

the first opening is one of a plurality of first openings, the second mask pattern exposing a region as a whole in which the plurality of first openings are provided,

the first hole is one of a plurality of first holes, and

etching the stacked body includes:

forming the plurality of first holes reaching the same level with each other from an uppermost layer of the stacked body at positions each corresponding to one of the plurality of first openings.

2. The manufacturing method of a semiconductor memory device according to claim 1 , wherein

forming the plurality of second holes includes:

causing the end of the second mask pattern to retreat to expose an opening of the plurality of second openings at an n-th position, toward a retreat direction of the second mask pattern, from an end position of the second mask pattern before causing the end of the second mask pattern to retreat, and etching the stacked body to cause an n-th second hole to penetrate m layers from the uppermost layer, n and m each being an integer equal to or greater than 1;

causing the end of the second mask pattern to retreat to expose an opening of the plurality of second openings at an (n+1)-th position from the end position toward the retreat direction, and etching the stacked body to cause the n-th second hole to penetrate 2m layers from the uppermost layer, and cause an (n+1)-th second hole to penetrate m layers from the uppermost layer; and

causing the end of the second mask pattern to retreat to expose an opening of the plurality of second openings at an (n+2)-th position from the end position toward the retreat direction, and etching the stacked body to cause the n-th second hole to penetrate 3m layers from the uppermost layer, cause the (n+1)-th second hole to penetrate 2m layers from the uppermost layer, and cause an (n+2)-th second hole to penetrate m layers from the uppermost layer.

3. The manufacturing method of a semiconductor memory device according to claim 2 , wherein

forming the plurality of first holes includes:

causing each of the plurality of first holes to penetrate at least m layers from the uppermost layer when causing the n-th second hole to penetrate m layers from the uppermost layer;

causing each of the plurality of first holes to penetrate at least 2m layers from the uppermost layer when causing the (n+1)-th second hole to penetrate m layers from the uppermost layer; and

causing each of the plurality of first holes to penetrate at least 3m layers from the uppermost layer when causing the (n+2)-th second hole to penetrate m layers from the uppermost layer.

4. The manufacturing method of a semiconductor memory device according to claim 2 , wherein

the first mask pattern:

has the first opening in a first region on the stacked body;

has the plurality of second openings in a second region different from the first region; and

further has a plurality of third openings in the second region, and

when the first hole and the second holes are formed, a plurality of third holes extending in the stacked body in the stacking direction are formed at positions of the plurality of third openings.

5. The manufacturing method of a semiconductor memory device according to claim 4 , wherein

the plurality of third holes reaching the same level with each other from the uppermost layer are formed at positions each corresponding to one of the plurality of third openings.

6. The manufacturing method of a semiconductor memory device according to claim 5 , wherein

forming the plurality of third holes includes:

causing each of the plurality of third holes to penetrate at least m layers from the uppermost layer when causing the n-th second hole to penetrate m layers from the uppermost layer,

causing each of the plurality of third holes to penetrate at least 2m layers from the uppermost layer when causing the (n+1)-th second hole to penetrate m layers from the uppermost layer, and

causing each of the plurality of third holes to penetrate at least 3m layers from the uppermost layer when causing the (n+2)-th second hole to penetrate m layers from the uppermost layer.

7. The manufacturing method of a semiconductor memory device according to claim 1 , wherein the first hole is a memory hole for forming a plurality of memory cells along a height direction in the stacked body.

8. The manufacturing method of a semiconductor memory device according to claim 1 , wherein the plurality of second holes are contact holes for forming contacts electrically connected to a plurality of memory cells at different height positions respectively.

9. The manufacturing method of a semiconductor memory device according to claim 4 , wherein the plurality of third holes are holes for forming columnar portions to support the stacked body.

10. The manufacturing method of a semiconductor memory device according to claim 1 , wherein

the plurality of first layers are sacrificial layers, and

the method further comprises replacing the plurality of first layers with conductive layers after forming the first hole and the second holes.

11. The manufacturing method of a semiconductor memory device according to claim 1 , wherein the plurality of first layers are conductive layers.

12. The manufacturing method of a semiconductor memory device according to claim 1 , wherein the first mask pattern includes an inorganic material.

13. The manufacturing method of a semiconductor memory device according to claim 12 , wherein the second mask pattern includes an organic material.

14. A manufacturing method of a semiconductor memory device, comprising:

forming a stacked body in which a plurality of first layers are stacked while being separated from one another;

forming a first mask pattern having a first opening and a plurality of second openings above the stacked body;

forming a second mask pattern covering some of the plurality of second openings; and

etching the stacked body with the first mask pattern as a mask while sequentially exposing the plurality of second openings by causing an end of the second mask pattern to retreat to for a first hole extending in the stacked body in a stacking direction of the stacked body at a position of the first opening and form a plurality of second holes extending in the stacked body to different depths in the stacking direction at positions of the plurality of second openings, and reaching first layers of the plurality of first layers at different levels, wherein

forming the plurality of second holes includes:

causing the end of the second mask pattern to retreat to expose an opening of the plurality of second openings at an n-th position, toward a retreat direction of the second mask pattern, from an end position of the second mask pattern before causing the end of the second mask pattern to retreat, and etching the stacked body to cause an n-th second hole to penetrate m layers from an uppermost layer of the stacked body, n and m each being an integer equal to or greater than 1;

causing the end of the second mask pattern to retreat to expose an opening of the plurality of second openings at an (n+1)-th position from the end position toward the retreat direction, and etching the stacked body to cause the n-th second hole to penetrate 2m layers from the uppermost layer, and cause an (n+1)-th second hole to penetrate m layers from the uppermost layer; and

causing the end of the second mask pattern to retreat to expose an opening of the plurality of second openings at are (n+2)-th position from the end position toward the retreat direction, and etching the stacked body to cause the n-th second hole to penetrate 3m layers from the uppermost layer, cause the (n+1)-th second hole to penetrate 2m layers from the uppermost layer, and cause an (n+2)-th second hole to penetrate m layers from the uppermost layer,

the first opening is one of a plurality of first openings,

the first hole is one of a plurality of first holes,

etching the stacked body includes:

forming the plurality of first holes reaching the same level with each other from the uppermost layer at positions each corresponding to one of the plurality of first openings, and

forming the plurality of first holes includes:

causing each of the plurality of first holes to penetrate at least m layers from the uppermost layer when causing the n-th second hole to penetrate m layers from the uppermost layer;

causing each of the plurality of first holes to penetrate at least 2m layers from the uppermost layer when causing the (n+1)-th second hole to penetrate m layers from the uppermost layer; and

causing each of the plurality of first holes to penetrate at least 3m layers from the uppermost layer when causing the (n+2)-th second hole to penetrate m layers from the uppermost layer.