IP Library › Granted Patent US 11,444,157
Granted Patent B2
US 11,444,157 · App. 17/069,990 · Granted Sep 13, 2022

Semiconductor device including first and second buffer layers

Inventors: Kenji Suzuki (Tokyo, JP); Koichi Nishi (Tokyo, JP); Katsumi Nakamura (Tokyo, JP)
Assignee: Mitsubishi Electric Corporation
H01L29/0834H01L21/26513H01L21/324H01L29/1095H01L29/66348H01L29/7397
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Quick Facts
Patent No.
US 11,444,157
App. No.
17/069,990
Granted
Sep 13, 2022
Kind
B2
Abstract

An object is to provide a technique of improving productivity of a semiconductor device. A first buffer layer includes a first portion located in a thickness direction of a semiconductor substrate from a main surface and having a first peak of an N type impurity concentration and a second portion located farther away from the main surface than the first portion and having a second peak of an N type impurity concentration. A distance from the main surface to the first portion is equal to or smaller than 4.0 μm, and a distance from the first portion to the second portion is equal to or larger than 14.5 μm. An N type impurity concentration of a portion between the first portion and the second portion is higher than an N type impurity concentration of a drift layer.

Claims (43)

1. A semiconductor device, comprising

a semiconductor substrate having a main surface, wherein

the semiconductor substrate includes:

an N type drift layer;

an N type first buffer layer disposed on a side of the main surface of the substrate to be adjacent to the drift layer and including proton as an N type impurity; and

an N type second buffer layer disposed on a side of the main surface of the substrate to be adjacent to the first buffer layer and including an N type impurity different from proton,

the first buffer layer includes:

a first portion located in a thickness direction of the semiconductor substrate from the main surface of the substrate and having a first peak of an N type impurity concentration; and

a second portion located farther away from the main surface of the substrate than the first portion and having a second peak of an N type impurity concentration,

a distance from the main surface of the substrate to the first peak is equal to or smaller than 4.0 μm and greater than 0 μm,

a distance from the first peak to the second peak is equal to or larger than 14.5 μm and less than a distance from the main surface of the substrate to the drift layer, and

an N type impurity concentration of a portion between the first portion and the second portion is higher than an N type impurity concentration of the drift layer.

2. The semiconductor device according to claim 1 , wherein

the N type impurity of the second buffer layer includes phosphorus.

3. The semiconductor device according to claim 1 , wherein

the first peak is higher than the second peak.

4. The semiconductor device according to claim 3 , wherein

a peak of an N type impurity concentration of the second buffer layer is higher than the first peak.

5. The semiconductor device according to claim 1 , wherein

a half-value width of the first peak is smaller than a half-value width of the second peak, and

a half-value width of a peak of the N type impurity concentration of the second buffer layer is smaller than a half-value width of the first peak.

6. The semiconductor device according to claim 1 , wherein

specific resistance of the drift layer is equal to or larger than 50 Ω·cm and equal to or smaller than 67 Ω·cm, and

a total thickness of the drift layer, the first buffer layer, and the second buffer layer is equal to or larger than 110 μm and equal to or smaller than 130 μm.

7. The semiconductor device according to claim 1 , wherein

specific resistance of the drift layer is equal to or larger than 90 Ω·cm and equal to or smaller than 130 Ω·cm, and

a total thickness of the drift layer, the first buffer layer, and the second buffer layer is equal to or larger than 170 μm and equal to or smaller than 210 μm.

8. The semiconductor device according to claim 1 , wherein

specific resistance of the drift layer is equal to or larger than 130 Ω·cm and equal to or smaller than 180 Ω·cm, and

a total thickness of the drift layer, the first buffer layer, and the second buffer layer is equal to or larger than 200 μm and equal to or smaller than 260 μm.

9. The semiconductor device according to claim 1 , wherein

specific resistance of the drift layer is equal to or larger than 200 Ω·cm and equal to or smaller than 300 Ω·cm, and

a total thickness of the drift layer, the first buffer layer, and the second buffer layer is equal to or larger than 340 μm and equal to or smaller than 420 μm.

10. The semiconductor device according to claim 1 , wherein

specific resistance of the drift layer is equal to or larger than 300 Ω·cm and equal to or smaller than 400 Ω·cm, and

a total thickness of the drift layer, the first buffer layer, and the second buffer layer is equal to or larger than 420 μm and equal to or smaller than 520 μm.

11. The semiconductor device according to claim 1 , wherein

specific resistance of the drift layer is equal to or larger than 600 Ω·cm and equal to or smaller than 800 Ω·cm, and

a total thickness of the drift layer, the first buffer layer, and the second buffer layer is equal to or larger than 580 μm and equal to or smaller than 720 μm.

12. The semiconductor device according to claim 1 , wherein

the N type impurity concentration of the entire portion between the first portion and the second portion is lower than the N type impurity concentration of the second peak.

13. The semiconductor device according to claim 1 , wherein

the distance from the first peak to the second peak is equal to or less than 24.5 μm.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 14, 2020
From: SUZUKI, KENJI; NISHI, KOICHI; NAKAMURA, KATSUMI
To: MITSUBISHI ELECTRIC CORPORATION
Reel/Frame 054048/0427 →
Priority Claims (1)
JP JP2020-034631 · Mar 2, 2020 · national
Continuity (1)
Related Publication 20210273053A1 · Sep 2, 2021