Solid-state imaging element, imaging apparatus, and method for controlling solid-state imaging element
To widen a dynamic range without reducing a frame rate in a solid-state imaging element provided with a differential amplifier circuit. The solid-state imaging element includes a reading circuit and a processing unit. The reading circuit performs processing of outputting a differentially amplified signal obtained by amplifying a difference between generated voltages of a pair of pixels and processing of outputting a pixel signal of the generated voltage of at least one of the pair of pixels each time the pair of pixels are exposed. The processing unit performs synthesis processing of synthesizing the output differentially amplified signal and the output pixel signal.
1. A solid-state imaging element comprising:
a reading circuit that performs processing of outputting a differentially amplified signal obtained by amplifying a difference between generated voltages of a pair of pixels and processing of outputting a pixel signal of the generated voltage of at least one of the pair of pixels each time the pair of pixels are exposed; and
a processing unit that performs synthesis processing of synthesizing the output differentially amplified signal and the output pixel signal.
2. The solid-state imaging element according to claim 1 , wherein
each of the pair of pixels generates a reset level as the generated voltage when initialized, and generates a signal level as the generated voltage when exposure is ended.
3. The solid-state imaging element according to claim 2 , wherein
the reading circuit outputs at least one of a first reset level obtained by differentially amplifying the reset level of each of the pair of pixels or a second reset level that is the reset level of one of the pair of pixels, and outputs a first signal level obtained by differentially amplifying the signal level of each of the pair of pixels and a second signal level that is the signal level of one of the pair of pixels.
4. The solid-state imaging element according to claim 3 , wherein
the reading circuit outputs the first signal level and the second signal level after outputting the first reset level and the second reset level.
5. The solid-state imaging element according to claim 3 , wherein
the reading circuit further outputs the second signal level and the second reset level after outputting the first reset level and the first signal level.
6. The solid-state imaging element according to claim 5 , wherein
the processing unit includes:
an analog-digital converter that sequentially converts the first reset level, the first signal level, the second signal level, and the second reset level into a digital signal in a case where illuminance is higher than a predetermined value, and sequentially converts the first reset level and the first signal level into a digital signal in a case where the illuminance is less than the predetermined value; and
a synthesis processing unit that performs the synthesis processing on a basis of the digital signal.
7. The solid-state imaging element according to claim 3 , wherein
the processing unit selects and outputs the differentially amplified signal in a case where illuminance is less than a predetermined value, and selects and outputs the pixel signal in a case where the illuminance exceeds the predetermined value.
8. The solid-state imaging element according to claim 3 , wherein
the reading circuit outputs one of the first signal level and the second signal level after outputting the first reset level and the second reset level.
9. The solid-state imaging element according to claim 1 , wherein
in the reading circuit, a plurality of unit reading circuits each including a current mirror circuit, a current source, and a switch is arranged in a predetermined direction, and
the switch connects the current mirror circuit and the current source of each of the plurality of unit reading circuits to each other.
10. The solid-state imaging element according to claim 1 , further comprising
a pixel array unit in which a plurality of pixels is arranged in a two-dimensional grid pattern, wherein
the pair of pixels are horizontally arranged in the pixel array unit.
11. The solid-state imaging element according to claim 1 , further comprising
a pixel array unit in which a plurality of pixels is arranged in a two-dimensional grid pattern, wherein
the pair of pixels are vertically arranged in the pixel array unit.
12. The solid-state imaging element according to claim 1 , further comprising
a pixel array unit in which a plurality of pixels to each of which a vertical address and a horizontal address are assigned is arranged in a two-dimensional grid pattern, wherein
the pair of pixels are pixels in which the vertical addresses and the horizontal addresses are different from each other in the pixel array unit.
13. The solid-state imaging element according to claim 1 , further comprising
a pixel array unit in which a plurality of read pixels and a reference pixel associated with the plurality of read pixels are arranged, wherein
one of the pair of pixels is one of the plurality of read pixels, and another of the pair of pixels is the reference pixel,
the reading circuit performs processing of outputting a differentially amplified signal obtained by amplifying a difference between pixel signals of the read pixel and the reference pixel, and processing of outputting the pixel signal of the read pixel.
14. The solid-state imaging element according to claim 1 , wherein
the reading circuit includes a current mirror circuit.
15. The solid-state imaging element according to claim 14 , wherein
the current mirror circuit includes a cascode current mirror circuit.
16. The solid-state imaging element according to claim 14 , wherein
the current mirror circuit is connected to a pair of vertical signal lines, and
the reading circuit further includes a switch that selects one of the pair of vertical signal lines and connects the vertical signal line to the processing unit.
17. The solid-state imaging element according to claim 1 , further comprising:
a digital-analog converter that includes a current source that generates a predetermined reference current and a resistor that generates a predetermined reference signal according to the reference current; and
a system control unit that controls a value of the reference current, wherein
the processing unit includes a comparator that compares a signal output by the reading circuit with a predetermined reference signal.
18. An imaging apparatus comprising:
a pair of pixels;
a reading circuit that performs processing of outputting a differentially amplified signal obtained by amplifying a difference between generated voltages of the pair of pixels and processing of outputting a pixel signal of the generated voltage of at least one of the pair of pixels each time the pair of pixels are exposed; and
a processing unit that performs synthesis processing of synthesizing the output differentially amplified signal and the output pixel signal.
19. A method for controlling a solid-state imaging element, the method comprising:
a reading procedure that performs processing of outputting a differentially amplified signal obtained by amplifying a difference between generated voltages of a pair of pixels and processing of outputting a pixel signal of the generated voltage of at least one of the pair of pixels each time the pair of pixels are exposed; and
a processing procedure that performs synthesis processing of synthesizing the output differentially amplified signal and the output pixel signal.