Semiconductor device and method of manufacture
A method of manufacturing a semiconductor device includes forming a polymer mixture over a substrate, curing the polymer mixture to form a polymer material, and patterning the polymer material. The polymer mixture includes a polymer precursor, a photosensitizer, a cross-linker, and a solvent. The polymer precursor may be a polyamic acid ester. The cross-linker may be tetraethylene glycol dimethacrylate. The photosensitizer includes 4-phenyl-2-(piperazin-1-yl)thiazole. The mixture may further include an additive.
1. A method of manufacturing a semiconductor device, the method comprising:
placing a polymer material over a substrate, the polymer material comprising:
a polymer precursor;
a photosensitizer, the photosensitizer comprising 4-phenyl-2-(piperazin-1-yl)thiazole;
a cross-linker; and
a solvent;
patterning the polymer material; and
curing the polymer material at a temperature in a range of 170° C. to 230° C.
2. The method of claim 1 , wherein the solvent comprises gamma butyrolactone (GBL) and dimethyl sulfoxide (DMSO).
3. The method of claim 2 , wherein the polymer material before curing comprises GBL in a range of 40% to 50% by weight.
4. The method of claim 3 , wherein the polymer material before curing comprises DMSO in a range of 5% to 15% by weight.
5. The method of claim 1 , wherein the polymer precursor before curing comprises a polyamic acid ester.
6. The method of claim 1 , wherein the polymer material before curing comprises the polymer precursor in a range of 25% to 35% by weight.
7. The method of claim 1 , wherein the polymer material before curing comprises the photosensitizer in a range of 0.1% to 2.5% by weight.
8. The method of claim 1 , wherein the polymer material before curing further comprises an additive.
9. The method of claim 8 , wherein the additive is chosen from the group consisting of 2-Benzyl-2-(dimethylamino)-1-[4-(morpholinyl) phenyl)]-1-butanone, (2-dimethylamino-2-(4-methylbenzyl)-1-(4-morpholine-4-ylphenyebutane-1-one, 1-[4-(phenylthio)phenyl]-1,2octanedione-2(o-benzoyloxime), and 1-[9[ethyl-6-(2-methylbenzoyl)-9H-carbazole-3-yl]etanone o-acetyl oxime.
10. A method of manufacturing a semiconductor device, the method comprising:
applying a polymer mixture over a substrate, the polymer mixture comprising:
a polymer precursor;
a solvent;
a cross-linker, the cross-linker comprising tetraethylene glycol dimethacrylate, the polymer mixture being 2% to 10% cross-linker by weight; and
a photosensitizer, the photosensitizer comprising 4-phenyl-2-(piperazin-1-yl)thiazole;
exposing and developing at least a portion of the polymer mixture to form a dielectric layer;
curing the dielectric layer; and
forming a metallization pattern over the dielectric layer.
11. The method of claim 10 , wherein the curing the dielectric layer is performed at a temperature in a range of 170° C. to 230° C.
12. The method of claim 10 , wherein the exposing and the developing at least the portion of the polymer mixture is performed with an exposure energy in a range of 90mJ to 110 mJ.
13. The method of claim 10 , wherein the solvent comprises dimethyl sulfoxide and gamma butyrolactone.
14. The method of claim 10 , wherein the polymer mixture further comprises an additive, the additive comprising 4,4′-Bis(diethylamino)benzophenone.
15. The method of claim 10 , wherein after the curing the dielectric layer the dielectric layer has a tensile strength in a range of 184 MPa to 190 MPa.
16. The method of claim 10 , wherein the dielectric layer has an elongation percentage in a range of 72% to 79%.
17. The method of claim 10 , wherein the dielectric layer has a thermomechanical analysis glass transition temperature in a range of 217° C. to 219° C.
18. A semiconductor package, comprising:
a die on a first dielectric layer;
an encapsulant on the first dielectric layer, the encapsulant encapsulating the die;
a through via extending through the encapsulant; and
a redistribution structure over the encapsulant, the die, and the through via, the redistribution structure comprising:
a second dielectric layer, the second dielectric layer having a tensile strength in a range of 175 MPa to 190 MPa and having a Young's modulus of 3 GPa, wherein the second dielectric layer comprises a dielectric feature extending into the encapsulant to a depth greater than 10 μm, the dielectric feature having a width in a range of 15 μm to 25 μm; and
a metallization pattern on the second dielectric layer, the metallization pattern comprising a first conductive via extending through the second dielectric layer to physically and electrically couple the die and a second conductive via extending through the second dielectric layer to physically and electrically couple the through via.
19. The semiconductor package of claim 18 , wherein the second dielectric layer comprises the following chemical structure:
20. The semiconductor package of claim 18 , wherein the second conductive via has a via angle a measured between a sidewall of the second conductive via and a bottom surface of the second dielectric layer in a range of 70° to 83°.