IP Library › Granted Patent US 11,455,209
Granted Patent B2
US 11,455,209 · App. 17/412,026 · Granted Sep 27, 2022

Memory system

Inventors: Takahiro Kubota (Kawasaki Kanagawa, JP); Daiki Watanabe (Kawasaki Kanagawa, JP); Hironori Uchikawa (Fujisawa Kanagawa, JP)
Assignee: KIOXIA CORPORATION
G06F11/1068
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Quick Facts
Patent No.
US 11,455,209
App. No.
17/412,026
Granted
Sep 27, 2022
Kind
B2
Abstract

A memory system includes a non-volatile memory configured to store an N-dimensional error correction code and a memory controller. The memory controller is configured to calculate an a th soft-input value for an a th component code based on correction information of the a th component code (1≤a≤ni) of an i th dimension (1≤i≤N), a th reliability information, and a syndrome value of the a th component code, to calculate a decoded word of the a th component code, the a th correction information, and the a th reliability information by inputting the a th soft-input value and executing a decoding process of the a th component code, to store the a th correction information and b th correction information indicating a corrected position of a b th component code (1≤b≤nj) of a j th dimension (j≠i, 1≤j≤N) in a correction information memory, to store the a th reliability information in a reliability information memory, and to output an output decoded word calculated from the read information and the reliability information of each component code.

Claims (45)

1. A memory system comprising:

a non-volatile memory configured to store an N-dimensional error correction code, wherein in the N-dimensional error correction code at least one symbol among symbols constituting the code is protected by N component code groups (N being an integer of 2 or more);

a read information memory configured to store read information read from the non-volatile memory;

a syndrome value memory configured to store a syndrome value of each of M component codes (1≤i≤N, ni being a number of component codes included in the component code group of an i th dimension, and M being a sum of ni) calculated from the read information;

a correction information memory configured to store a th correction information indicating at least a position corrected by each decoding process of an a th component code for each a th component code of the i th dimension (1≤a≤ni);

a reliability information memory configured to store a th reliability information indicating reliability of a decoded word obtained in the decoding process of the a th component code; and

a memory controller configured to:

calculate an a th soft-input value for the a th component code based on the a th correction information, the a th reliability information, and the syndrome value of the a th component code;

calculate a decoded word of the a th component code, the a th correction information, and the a th reliability information by inputting the a th soft-input value and executing the decoding process of the a th component code;

store the calculated a th correction information and b th correction information indicating a corrected position of a b th component code ((1≤b≤nj) of a j th dimension (j≠i, 1≤j≤N) corrected by the decoding process of the a th component code in the correction information memory;

store the calculated a th reliability information in the reliability information memory; and output an output decoded word calculated from the read information, the correction information, and M pieces of the a th reliability information.

2. The memory system according to claim 1 , wherein the memory controller is configured to execute a decoding process selected from among a plurality of types of decoding processes for the component code of the i th dimension.

3. The memory system according to claim 1 , wherein the memory controller is configured to determine whether or not to execute calculation of the a th correction information and calculation of the a th reliability information according to state information indicating a state of the decoding process.

4. The memory system according to claim 3 , wherein the state information indicates whether or not the syndrome value of the a th component code is changed, and

the memory controller is configured to determine to execute the calculation of the a th correction information and the calculation of the a th reliability information when the state information indicates that the syndrome value is changed.

5. The memory system according to claim 3 , wherein the state information indicates whether or not a new candidate of a position to be corrected by the decoding process is added, and

the memory controller is configured to determine to execute the calculation of the a th correction information and the calculation of the a th reliability information when the state information indicates that the new candidate of the position to be corrected by the decoding process is added.

6. The memory system according to claim 3 , wherein the state information indicates whether or not the a th soft-input value is changed, and

the memory controller is configured to determine to execute the calculation of the a th reliability information when the state information indicates that the a th soft-input value is changed.

7. The memory system according to claim 3 , wherein the memory controller is configured to repeatedly execute the decoding process of the a th component code until an end condition is satisfied, and to execute a decoding process selected from among a plurality of types of decoding process for the a th component code,

the state information indicates a type of the selected decoding process, and

the memory controller is configured to determine to execute the calculation of the a th correction information when a type of a k th (k being an integer of 1 or more) decoding process indicated by the state information is different from a type of a (k+1)th decoding process.

8. The memory system according to claim 3 , wherein the state information indicates whether or not a remaining storage capacity of the correction information memory is equal to or less than a first threshold value, and

the memory controller is configured to determine to execute the calculation of the a th reliability information when the remaining storage capacity of the correction information memory is equal to or less than the first threshold value.

9. The memory system according to claim 3 , wherein the state information indicates whether or not the correction information is stored in the correction information memory, and

the memory controller is configured to determine to execute the calculation of the a th correction information and the calculation of the a th reliability information when the state information indicates that the correction information is not stored in the correction information memory.

10. The memory system according to claim 1 , wherein the memory controller is configured to repeatedly execute the decoding process of the a th component code until an end condition is satisfied, and to determine whether or not to execute calculation of the a th correction information and calculation of the a th reliability information in a (k+1)th decoding process according to the a th reliability information calculated in a k th (k being an integer of 1 or more) decoding process.

11. The memory system according to claim 1 , wherein the memory controller is configured to correct the read information stored in the read information memory based on the a th correction information and to correct the syndrome value stored in the syndrome value memory according to the correction of the read information when the a th reliability information is larger than a second threshold value.

12. A method of operating a memory system, the memory system having: a non-volatile memory configured to store an N-dimensional error correction code, wherein in the N-dimensional error correction code at least one symbol among symbols constituting the code is protected by N component code groups (N being an integer of 2 or more); a read information memory configured to store read information read from the non-volatile memory; a syndrome value memory configured to store a syndrome value of each of M component codes (1≤i≤N, ni being a number of component codes included in the component code group of an i th dimension, and M being a sum of ni) calculated from the read information; a correction information memory configured to store a th correction information indicating at least a position corrected by each decoding process of an a th component code for each a th component code of the i th dimension (1≤a≤ni); and a reliability information memory configured to store a th reliability information indicating reliability of a decoded word obtained in the decoding process of the a th component code, the method comprising:

calculating an a th soft-input value for the a th component code based on the a th correction information, the a th reliability information, and the syndrome value of the a th component code;

calculating a decoded word of the a th component code, the a th correction information, and the a th reliability information by inputting the a th soft-input value and executing the decoding process of the a th component code;

storing the calculated a th correction information and b th correction information indicating a corrected position of a b th component code ((1≤b≤nj) of a j th dimension (j≠i, 1≤j≤N) corrected by the decoding process of the a th component code in the correction information memory;

storing the calculated a th reliability information in the reliability information memory; and

outputting an output decoded word calculated from the read information, the correction information, and M pieces of the a th reliability information.

13. The method according to claim 12 , further comprising executing a decoding process selected from among a plurality of types of decoding processes for the component code of the i th dimension.

14. The method according to claim 12 , further comprising determining whether or not to execute calculation of the a th correction information and calculation of the a th reliability information according to state information indicating a state of the decoding process.

15. The method according to claim 14 , wherein the state information indicates whether or not the syndrome value of the a th component code is changed, and the method further comprising determining to execute the calculation of the a th correction information and the calculation of the a th reliability information when the state information indicates that the syndrome value is changed.

16. The method according to claim 14 , wherein the state information indicates whether or not a new candidate of a position to be corrected by the decoding process is added, and the method further comprising executing the calculation of the a th correction information and the calculation of the a th reliability information when the state information indicates that the new candidate of the position to be corrected by the decoding process is added.

17. The method according to claim 14 , wherein the state information indicates whether or not the a th soft-input value is changed, and the method further comprises determining to execute the calculation of the a th reliability information when the state information indicates that the a th soft-input value is changed.

18. The method according to claim 14 , further comprising:

repeatedly executing the decoding process of the a th component code until an end condition is satisfied, and to execute a decoding process selected from among a plurality of types of decoding process for the a th component code, the state information indicates a type of the selected decoding process; and

determining to execute the calculation of the a th correction information when a type of a k th (k being an integer of 1 or more) decoding process indicated by the state information is different from a type of a (k+1) th decoding process.

19. The method according to claim 14 , wherein the state information indicates whether or not a remaining storage capacity of the correction information memory is equal to or less than a first threshold value, and

the method further comprises determining to execute the calculation of the a th reliability information when the remaining storage capacity of the correction information memory is equal to or less than the first threshold value.

20. The method according to claim 14 , further comprising correcting the read information stored in the read information memory based on the a th correction information and correcting the syndrome value stored in the syndrome value memory according to the correction of the read information when the a th reliability information is larger than a second threshold value.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 13, 2022
From: KUBOTA, TAKAHIRO; WATANABE, DAIKI; UCHIKAWA, HIRONORI
To: KIOXIA CORPORATION
Reel/Frame 058639/0918 →
Priority Claims (1)
JP JP2021-022456 · Feb 16, 2021 · national
Continuity (1)
Related Publication 20220261312A1 · Aug 18, 2022
Cited By (1)
US 12,619,362