System in package for lower z height and reworkable component assembly
Electronic package structures and assembly methods are described. In an embodiment, an electronic package includes a die mounted face up on a bottom side of a package substrate, and a plurality of components on a top side of the package substrate. The plurality of components may be unmolded, and available for rework. Additional structures are included within the package substrate to provide mechanical rigidity and robustness to the package for warpage control.
1. An electronic package assembly comprising:
a module substrate; and
an electronic package mounted on the module substrate with a plurality of solder bumps, the electronic package including:
a package substrate including a top side and a bottom side;
a die mounted face up on the bottom side of the package substrate;
a frame board mounted on the bottom side of the package substrate, wherein the plurality of solder bumps is on a bottom side of the frame board and bonded to the module substrate;
a bottom molding layer encapsulating the die and the frame board on the bottom side of the package substrate;
a top molding layer spanning the top side of the package substrate;
a plurality of bumps extending through the top molding layer on the top side of the package substrate, wherein the plurality of bumps is substantially located inside a thickness of the top molding layer; and
a plurality of components mounted on the plurality of bumps;
wherein the module substrate is wider than the electronic package.
2. The electronic package assembly of claim 1 , wherein the plurality of components are not encapsulated in a molding compound material.
3. The electronic package assembly of claim 2 , wherein the plurality of components are removable by desoldering from the plurality of bumps.
4. The electronic package assembly of claim 2 , wherein the module substrate is a printed circuit board.
5. The electronic package assembly of claim 2 , wherein the package substrate is a laminate in which a top half of the laminate has a higher coefficient of thermal expansion (CTE) than does a bottom half of the laminate.
6. The electronic package assembly of claim 2 , wherein the top molding layer does not encapsulate an electronic device.
7. The electronic package assembly of claim 2 , wherein the package substrate is a thin film redistribution layer with a total thickness of less than 70 μm and 8 or less metal layers.
8. The electronic package assembly of claim 2 , wherein the plurality of bumps are formed of a solder material.
9. The electronic package assembly of claim 8 , wherein the top molding layer does not encapsulate an electronic device.
10. The electronic package assembly of claim 9 , wherein the bottom molding layer and the top molding layer are formed of a same material.
11. The electronic package assembly of claim 9 , wherein the plurality of components are bonded to the plurality of bumps with a plurality of component solder bumps.
12. The electronic package assembly of claim 11 , wherein the plurality of component solder bumps are in direct contact with the plurality of bumps.
13. The electronic package assembly of claim 2 , wherein:
the top molding layer does not encapsulate an electronic device; and
the bottom molding layer and the top molding layer are formed of a same material.
14. The electronic package assembly of claim 2 , wherein:
the top molding layer does not encapsulate an electronic device; and
the plurality of components are bonded to the plurality of bumps with a plurality of component solder bumps.
15. The electronic package assembly of claim 14 , wherein the plurality of component solder bumps are in direct contact with the plurality of bumps.