Electroluminescent display panel having pixel driving circuit
A display panel includes a pixel including sub pixels. The pixel includes a sub pixel area in which the sub pixels are disposed and a common area. The pixel includes a light emitting diode including an anode electrode and a cathode electrode, and the anode electrode is electrically connected to a first power line to which a high potential voltage is supplied. Each of the sub pixels includes a driving element in which a source is connected to a N1 node, a gate is connected to a N2 node, and a drain is connected to a N3 node, a capacitor connected to the N2 node and a N4 node; a N1 switching circuit connected to the N1 node; a N2 switching circuit connected to the N2 node; a N3 switching circuit connected to the N3 node; and a N4 switching circuit connected to the N4 node.
1. A display panel, comprising:
a pixel including sub pixels,
wherein the pixel includes a sub pixel area in which the sub pixels are disposed and a common area, the pixel includes a light emitting diode including an anode electrode and a cathode electrode, the anode electrode is electrically connected to a first power line to which a high potential voltage is supplied,
each of the sub pixels includes:
a driving element in which a source is connected to a N1 node, a gate is connected to a N2 node, and a drain is connected to a N3 node,
a capacitor connected to the N2 node and a N4 node;
a N1 switching circuit connected to the N1 node;
a N2 switching circuit connected to the N2 node;
a N3 switching circuit connected to the N3 node; and
a N4 switching circuit connected to the N4 node, and
wherein the N4 switching circuit includes a switching circuit connected to a fourth power line which supplies a reference voltage, and
wherein the light emitting diode is electrically connected between the first power line and the driving element.
2. The display panel according to claim 1 , wherein the N4 switching circuit is disposed in the common area to be electrically connected to at least two of the sub pixels.
3. The display panel according to claim 2 , wherein two or more of the sub pixels are connected to each other by means of the N4 node.
4. The display panel according to claim 1 , wherein the N4 switching circuit is located in the common area.
5. The display panel according to claim 1 , wherein the N4 switching circuit is implemented by transistors controlled by an n−1-th scan signal, an n-th scan signal, and an n-th emission signal.
6. The display panel according to claim 1 , wherein a driving current value generated by the driving element while the light emitting diode emits light is determined based on the reference voltage.
7. The display panel according to claim 1 , wherein the N1 switching circuit is controlled by an n-th scan signal to supply a data voltage to the N1 node.
8. The display panel according to claim 1 , wherein the N2 switching circuit is controlled by an n−1-th scan signal and an n-th scan signal and is connected to a third power line to which an initialization voltage is supplied to supply the initialization voltage to the N2 node.
9. The display panel according to claim 1 , wherein the N3 switching circuit is controlled by a n-th emission signal so that the N3 node is connected to a second power line to which a low potential voltage is supplied.
10. The display panel according to claim 1 , wherein the light emitting diode includes inorganic layers.
11. A display panel, comprising:
a light emitting diode including an anode and a cathode; and
a pixel driving circuit which supplies a driving current to the light emitting diode,
wherein the anode is connected to a first power line to which a high potential voltage is supplied,
a sub pixel which includes the light emitting diode and the pixel driving circuit further includes:
a driving element in which a source is connected to a N1 node, a gate is connected to a N2 node, and a drain is connected to a N3 node,
an emission control circuit connected to the anode and the cathode;
a capacitor connected to the N2 node and a N4 node;
a N2 switching circuit connected to the N2 node;
a N3 switching circuit connected to the N3 node; and
a N1 switching circuit connected to the N1 node or a N4 switching circuit connected to the N4 node, and
wherein the N3 switching circuit includes a switching circuit connected to a fourth power line to which a reference voltage is supplied,
wherein the N3 node is electrically connected to a second power line to which a low potential voltage is supplied.
12. The display panel according to claim 11 , wherein the emission control circuit is controlled by an n−1-th scan signal or an n-th scan signal.
13. The display panel according to claim 11 , wherein the N2 switching circuit is controlled by an n-th scan signal to conduct the N2 node and the N3 node.
14. The display panel according to claim 13 , wherein the N2 switching circuit further includes a switching circuit which is controlled by an n−1-th scan signal and is connected to a third power line to which an initialization voltage is supplied.
15. The display panel according to claim 11 , wherein the N3 switching circuit is controlled by an n-th emission signal to supply low potential voltage to the N3 node.
16. The display panel according to claim 15 , wherein the N3 switching circuit further includes a switching circuit which is controlled by an n−1-th scan signal.
17. The display panel according to claim 11 , wherein the N1 switching circuit is controlled by an n-th scan signal to supply a data voltage to the N1 node.
18. The display panel according to claim 11 , wherein the N4 switching circuit is controlled by an n-th scan signal to supply a data voltage to the N4 node.
19. The display panel according to claim 18 , wherein the N4 switching circuit further includes a switching circuit which is controlled by an n-th emission signal and is connected to a fourth power line to which a reference voltage is supplied.
20. The display panel according to claim 11 , wherein the light emitting diode includes inorganic layers.