Semiconductor device
A semiconductor device includes: a first electrode; a second electrode; and a dielectric layer stack positioned between the first electrode and the second electrode, the dielectric layer stack including a first anti-ferroelectric layer, a second anti-ferroelectric layer, and a ferroelectric layer between the first anti-ferroelectric layer and the second anti-ferroelectric.
1. A semiconductor device, comprising:
a first electrode;
a second electrode; and
a dielectric layer stack disposed between the first electrode and the second electrode;
an interface layer disposed between the dielectric layer stack and the second electrode; and
an additional interface layer disposed between the first electrode and the dielectric layer stack,
wherein the dielectric layer stack includes:
a first stack;
a second stack; and
a high band gap layer disposed between the first stack and the second stack,
wherein each of the first stack and the second stack includes a first anti-ferroelectric layer, a second anti-ferroelectric layer, and a ferroelectric layer disposed between the first anti-ferroelectric layer and the second anti-ferroelectric layer.
2. The semiconductor device of claim 1 , wherein the first anti-ferroelectric layer, the ferroelectric layer, and the second anti-ferroelectric layer are vertically arranged between the first electrode and the second electrode.
3. The semiconductor device of claim 1 , wherein the first anti-ferroelectric layer and the second anti-ferroelectric layer include the same anti-ferroelectric material or different anti-ferroelectric materials.
4. The semiconductor device of claim 1 , wherein the first anti-ferroelectric layer, the second anti-ferroelectric layer, and the ferroelectric layer include an oxide containing hafnium, zirconium and oxygen.
5. The semiconductor device of claim 1 , wherein the first anti-ferroelectric layer and the second anti-ferroelectric layer include an anti-ferroelectric hafnium zirconium oxide, and the ferroelectric layer includes a ferroelectric hafnium zirconium oxide.
6. The semiconductor device of claim 1 , wherein the first anti-ferroelectric layer and the second anti-ferroelectric layer include a hafnium zirconium oxide having a zirconium content greater than a hafnium content.
7. The semiconductor device of claim 1 , wherein the ferroelectric layer includes a hafnium zirconium oxide whose hafnium content and zirconium content are the same.
8. The semiconductor device of claim 1 , wherein each of the first anti-ferroelectric layer, the second anti-ferroelectric layer, and the ferroelectric layer includes a hafnium zirconium oxide, and
the first anti-ferroelectric layer and the second anti-ferroelectric layer have a zirconium content at least twice as much as a hafnium content, and
the ferroelectric layer has a hafnium content and a zirconium content in a ratio of approximately 1:1.
9. The semiconductor device of claim 1 , wherein the first anti-ferroelectric layer and the second anti-ferroelectric layer include PbZrO 3 , PbHfO 3 , PbMgWO 3 , PbZrTiO 3 , BiNaTiO 3 or NaNbO 3 .
10. The semiconductor device of claim 1 , wherein the ferroelectric layer includes BaTiO 3 , PbTiO 3 , BiFeO 3 , SrTiO 3 , PbMgNdO 3 , PbMgNbTiO 3 , PbZrNbTiO 3 , PbZrTiO 3 , KNbO 3 , LiNbO 3 , GeTe, LiTaO 3 , KNaNbO 3 , or BaSrTiO 3 .
11. The semiconductor device of claim 1 , wherein the interface layer includes a material that is reduced prior to the dielectric layer stack.
12. The semiconductor device of claim 1 , wherein the interface layer and the additional interface layer include a material having a greater electronegativity than the first and second anti-ferroelectric layers and the ferroelectric layer.
13. The semiconductor device of claim 1 , wherein the interface layer and the additional interface layer include titanium oxide, tantalum oxide, niobium oxide, or tin oxide.
14. The semiconductor device of claim 1 , wherein the high band gap layer includes a material having a higher energy band gap than the first stack and the second stack.
15. The semiconductor device of claim 1 , wherein the high band gap layer includes a material having a higher energy band gap than the first anti-ferroelectric layer, the second anti-ferroelectric layer, and the ferroelectric layer.
16. The semiconductor device of claim 1 , wherein the high band gap layer includes aluminum oxide or beryllium oxide.
17. The semiconductor device of claim 1 , wherein the interface layer includes a stack of molybdenum and molybdenum nitride (Mo/MoN) or a stack of tungsten and tungsten nitride (W/WN).
18. The semiconductor device of claim 1 , further comprising:
a semiconductor substrate including a first doped region and a second doped region;
a word line buried in a semiconductor substrate between the first doped region and the second doped region;
a bit line formed over the word line and coupled to the first doped region; and
a storage node contact plug coupled to the second doped region,
wherein the first electrode is electrically connected to the storage node contact plug.